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Researcher
Stijn Eyerman
Profile
Projects
Publications
Activities
Awards & Distinctions
49
Results
2017
Analyzing the scalability of managed language applications with speedup stacks
Jennifer B. Sartor
Kristof Du Bois
Stijn Eyerman
Lieven Eeckhout
P1
Conference
2017
Improving IBM POWER8 performance through symbiotic job scheduling
Josue Feliu
Stijn Eyerman
Julio Sahuquillo
Salvador Petit
Lieven Eeckhout
A1
Journal Article
in
IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS
2017
Mind the power holes : sifting operating points in power-limited heterogeneous multicores
Almutaz Adileh
Stijn Eyerman
Aamer Jaleel
Lieven Eeckhout
A1
Journal Article
in
IEEE COMPUTER ARCHITECTURE LETTERS
2017
2016
Analytical processor performance and power modeling using micro-architecture independent characteristics
Sam Van den Steen
Stijn Eyerman
Sander De Pestel
Moncef Mechri
Trevor Carlson
David Black-Schaffer
Erik Hagersten
Lieven Eeckhout
A1
Journal Article
in
IEEE TRANSACTIONS ON COMPUTERS
2016
Symbiotic job scheduling on the IBM POWER8
Josue Feliu
Stijn Eyerman
Julio Sahuquillo
Salvador Petit
C1
Conference
2016
2015
Mechanistic analytical modeling of superscalar in-order processor performance
Maximilien Breughe
Stijn Eyerman
Lieven Eeckhout
A1
Journal Article
in
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION
2015
Mechanistic modeling of architectural vulnerability factor
Arun Nair
Stijn Eyerman
Jian Chen
Lizy John
Lieven Eeckhout
A1
Journal Article
in
ACM TRANSACTIONS ON COMPUTER SYSTEMS
2015
Micro-architecture independent analytical processor performance and power modeling
Sam Van den Steen
Sander De Pestel
Moncef Mechri
Stijn Eyerman
Trevor Carlson
David Black-Schaffer
Erik Hagersten
Lieven Eeckhout
P1
Conference
2015
Micro-architecture independent branch behavior modeling
Sander De Pestel
Stijn Eyerman
Lieven Eeckhout
P1
Conference
2015
Revisiting symbiotic job scheduling
Stijn Eyerman
Pierre Michaud
Wouter Rogiest
P1
Conference
2015
2014
An evaluation of high-level mechanistic core models
Trevor Carlson
Wim Heirman
Stijn Eyerman
Ibrahim Hur
Lieven Eeckhout
A1
Journal Article
in
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION
2014
Efficient design space exploration of embedded microprocessors
Maximilien Breughe
Lieven Eeckhout
Stijn Eyerman
Dissertation
2014
Multiprogram throughput metrics: a systematic approach
Stijn Eyerman
Pierre Michaud
Wouter Rogiest
A1
Journal Article
in
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION
2014
Performance analysis methods for understanding scaling bottlenecks in multi-threaded applications
Kristof Du Bois
Lieven Eeckhout
Stijn Eyerman
Dissertation
2014
The benefit of SMT in the multi-core era: flexibility towards degrees of thread-level parallelism
Stijn Eyerman
Lieven Eeckhout
A1
Journal Article
in
Proceedings of the 19th international conference on Architectural support for programming languages and operating systems
2014
2013
Bottle graphs: visualizing scalability bottlenecks in multi-threaded applications
Kristof Du Bois
Jennifer Sartor
Stijn Eyerman
Lieven Eeckhout
A1
Journal Article
in
ACM SIGPLAN NOTICES
2013
Criticality stacks: identifying critical threads in parallel programs using synchronization behavior
Kristof Du Bois
Stijn Eyerman
Jennifer Sartor
Lieven Eeckhout
C1
Conference
2013
Per-thread cycle accounting in multicore processors
Kristof Du Bois
Stijn Eyerman
Lieven Eeckhout
A1
Journal Article
in
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION
2013
Restating the case for weighted-IPC metrics to evaluate multiprogram workload performance
Stijn Eyerman
Lieven Eeckhout
A1
Journal Article
in
IEEE COMPUTER ARCHITECTURE LETTERS
2013
2012
A first-order mechanistic model for architectural vulnerability factor
Arun Arvind Nair
Stijn Eyerman
Lieven Eeckhout
Lizy Kurian John
P1
Conference
2012
A mechanistic performance model for superscalar in-order processors
Maximilien Breughe
Stijn Eyerman
Lieven Eeckhout
C1
Conference
2012
An efficient CPI stack counter architecture for superscalar processors
Osman Allam
Stijn Eyerman
Lieven Eeckhout
C1
Conference
2012
Probabilistic modeling for job symbiosis scheduling on SMT processors
Stijn Eyerman
Lieven Eeckhout
A1
Journal Article
in
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION
2012
Speedup stacks: identifying scaling Bottlenecks in multi-threaded applications
Stijn Eyerman
Kristof Du Bois
Lieven Eeckhout
C1
Conference
2012
2011
Fine-grained DVFS using on-chip regulators
Stijn Eyerman
Lieven Eeckhout
A1
Journal Article
in
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION
2011
How sensitive is processor customization to the workload's input datasets?
Maximilien Breughe
Li Zheng
Yang Chen
Stijn Eyerman
Olivier Temam
Chengyong Wu
Lieven Eeckhout
C1
Conference
2011
Mechanistic-empirical processor performance modeling for constructing CPI stacks on real hardware
Stijn Eyerman
Kenneth Hoste
Lieven Eeckhout
C1
Conference
2011
2010
A counter architecture for online DVFS profitability estimation
Stijn Eyerman
Lieven Eeckhout
A1
Journal Article
in
IEEE TRANSACTIONS ON COMPUTERS
2010
Interval simulation: raising the level of abstraction in architectural simulation
Davy Genbrugge
Stijn Eyerman
Lieven Eeckhout
P1
Conference
2010
Modeling critical sections in Amdahl's law and its implications for multicore design
Stijn Eyerman
Lieven Eeckhout
P1
Conference
2010
Per-thread cycle accounting
Stijn Eyerman
Lieven Eeckhout
A1
Journal Article
in
IEEE MICRO
2010
Probabilistic job symbiosis modeling for SMT processor scheduling
Stijn Eyerman
Lieven Eeckhout
A1
Journal Article
in
ACM SIGPLAN NOTICES
2010
2009
A mechanistic performance model for superscalar out-of-order processors
Stijn Eyerman
Lieven Eeckhout
Tejas Karkhanis
James E Smith
A1
Journal Article
in
ACM TRANSACTIONS ON COMPUTER SYSTEMS
2009
MLP-Aware runahead threads in a simultaneous multithreading processor
Kenzo Van Craeynest
Stijn Eyerman
Lieven Eeckhout
P1
Conference
2009
Memory-level parallelism aware fetch policies for simultaneous multithreading processors
Stijn Eyerman
Lieven Eeckhout
A1
Journal Article
in
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION
2009
Per-thread cycle accounting in SMT processors
Stijn Eyerman
Lieven Eeckhout
A1
Journal Article
in
ACM SIGPLAN NOTICES
2009
Raising the level of abstraction in architectural simulation
Davy Genbrugge
Stijn Eyerman
Lieven Eeckhout
C1
Conference
2009
Raising the level of abstraction in architectural simulation
Davy Genbrugge
Stijn Eyerman
Lieven Eeckhout
C1
Conference
2009
2008
Studying Compiler Optimizations on Superscalar Processors through Interval Analysis
Stijn Eyerman
Lieven Eeckhout
James E. Smith
P1
Conference
2008
System-level performance metrics for multiprogram workloads
Stijn Eyerman
Lieven Eeckhout
A1
Journal Article
in
IEEE MICRO
2008
2007
A memory-level parallelism aware fetch policy for SMT processors
Stijn Eyerman
Lieven Eeckhout
P1
Conference
2007
A top-down approach to architecting CPI component performance counters
Stijn Eyerman
Lieven Eeckhout
T KARKHANIS
JE SMITH
A1
Journal Article
in
IEEE MICRO
2007
Studying Compiler-Microarchitecture Interactions through Interval Analysis
Stijn Eyerman
Lieven Eeckhout
J SMITH
C1
Conference
2007
2006
A performance counter architecture for computing accurate CPI components
Stijn Eyerman
Lieven Eeckhout
Tejas Karkhanis
James E Smith
A1
Journal Article
in
ACM SIGPLAN NOTICES
2006
A performance counter architecture for computing accurate CPI components
Stijn Eyerman
Lieven Eeckhout
Tejas Karkhanis
James E Smith
C1
Conference
2006
Characterizing the branch misprediction penalty
Stijn Eyerman
James E Smith
Lieven Eeckhout
P1
Conference
2006
Efficient design space exploration of high performance embedded out-of-order processors
Stijn Eyerman
Lieven Eeckhout
Koen De Bosschere
P1
Conference
2006
2005
The shape of the processor design space and its implications for early stage explorations
Stijn Eyerman
Lieven Eeckhout
Koen De Bosschere
P1
Conference
2005
2003
Accurately Warmed-up Trace Samples for the Evaluation of Cache Memories.
Lieven Eeckhout
Stijn Eyerman
Bert Callens
Koen De Bosschere
C1
Conference
2003