Research Explorer

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Onderzoeker

Lieven Eeckhout

Publicaties & datasets

Prijzen & Erkenningen

358 Resultaten

2025

Memory-centric MCM-GPU architecture

Seyyed Hossein SeyyedAghaei RezaeiMahmood Naderan-TahanMagnus JahreLieven Eeckhout

A1 Artikel in een tijdschrift in IEEE COMPUTER ARCHITECTURE LETTERS

Scalar vector runahead : removing the shackles of indirect memory chains on in-order cores

Jaime RoelandtsAjeya NaithaniSam AinsworthTimothy M. JonesLieven Eeckhout

A1 Artikel in een tijdschrift in IEEE MICRO

The architectural sustainability indicator

Jaime RoelandtsAjeya NaithaniLieven Eeckhout

A1 Artikel in een tijdschrift in IEEE COMPUTER ARCHITECTURE LETTERS

The sustainability gap for computing : quo vadis?

Lieven Eeckhout

A1 Artikel in een tijdschrift in COMMUNICATIONS OF THE ACM

2024

Decoupled vector runahead for prefetching nested memory-access chains

Ajeya NaithaniJaime RoelandtsSam AinsworthTimothy M. JonesLieven Eeckhout

A1 Artikel in een tijdschrift in IEEE MICRO

FOCAL : a first-order carbon model to assess processor sustainability

Lieven Eeckhout

GPU scale-model simulation

Seyyed Hossein SeyyedAghaei RezaeiMahmood Naderan-TahanLieven Eeckhout

Per-instruction cycle stacks through time-proportional event analysis

Bjorn GottschallLieven EeckhoutMagnus Jahre

A1 Artikel in een tijdschrift in IEEE MICRO

Rip geomean speedup use equal-work (or equal-time) harmonic mean speedup instead

Lieven Eeckhout

A1 Artikel in een tijdschrift in IEEE COMPUTER ARCHITECTURE LETTERS

Scalar Vector Runahead

Jaime RoelandtsAjeya NaithaniSam AinsworthTimothy M. JonesLieven Eeckhout

STAR : Sub-Entry Sharing-Aware TLB for Multi-Instance GPU

Bingyao LiYueqi WangTianyu WangLieven EeckhoutJun YangAamer JaleelXulong Tang

Sustainable hardware specialization

Pranav DangiThilini Kaushalya BandaraSaeideh SheikhpourTulika MitraLieven Eeckhout

Sustainable high-performance instruction selection for superscalar processors

Saeideh SheikhpourDavid MetzErling JellumMagnus SjalanderLieven Eeckhout

2023

Balancing performance against cost and sustainability in multi-chip-module GPUs

Shiqing ZhangMahmood Naderan-TahanMagnus JahreLieven Eeckhout

A1 Artikel in een tijdschrift in IEEE COMPUTER ARCHITECTURE LETTERS

Characterizing multi-chip GPU data sharing

Shiqing ZhangMahmood Naderan-TahanMagnus JahreLieven Eeckhout

A1 Artikel in een tijdschrift in ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION

Decoupled vector runahead

Ajeya NaithaniJaime RoelandtsSam AinsworthTimothy M. JonesLieven Eeckhout

Kaya for computer architects : toward sustainable computer systems

Lieven Eeckhout

A1 Artikel in een tijdschrift in IEEE MICRO

Low-complexity and power-efficient processor architectures

Kartik LakshminarasimhanLieven EeckhoutAjeya Naithani

NUBA : non-uniform bandwidth GPUs

Xia ZhaoMagnus JahreYuhua TangGuangda ZhangLieven Eeckhout

Photonic network-on-wafer for multichiplet GPUs

Shiqing ZhangZiyue ZhangMahmood Naderan-TahanSeyyed Hossein SeyyedAghaei RezaeiXin WangLionel HertzogSenbiao QinDidier ColleGuy TorfsMario Pickavet et al.

A1 Artikel in een tijdschrift in IEEE MICRO

SAC : sharing-aware caching in multi-chip GPUs

Shiqing ZhangMahmood Naderan-TahanMagnus JahreLieven Eeckhout

Scaling performance in multi-chip GPU systems : challenges and opportunities

Shiqing ZhangLieven EeckhoutMahmood Naderan-Tahan

Sieve : stratified GPU-compute workload sampling

Mahmood Naderan-TahanSeyyed Hossein SeyyedAghaei RezaeiLieven Eeckhout

TEA : time-proportional event analysis

Bjorn GottschallLieven EeckhoutMagnus Jahre

2022

A first-order model to assess computer architecture sustainability

Lieven Eeckhout

A1 Artikel in een tijdschrift in IEEE COMPUTER ARCHITECTURE LETTERS

Delegated replies : alleviating network clogging in heterogeneous architectures

Xia ZhaoLieven EeckhoutMagnus Jahre

Reliability-aware management in hybrid memories : evaluation through scale-model simulation

Wenjie LiuLieven Eeckhout

Reliability-aware runahead

Ajeya NaithaniLieven Eeckhout

Scale-model architectural simulation

Wenjie LiuWim HeirmanStijn EyermanShoaib AkramLieven Eeckhout

The forward slice core : a high-performance, yet low-complexity microarchitecture

Kartik LakshminarasimhanAjeya NaithaniJosue FeliuLieven Eeckhout

A1 Artikel in een tijdschrift in ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION

Vector runahead for indirect memory accesses

Ajeya NaithaniSam AinsworthTimothy M. JonesLieven Eeckhout

A1 Artikel in een tijdschrift in IEEE MICRO

VMT : virtualized multi-threading for accelerating graph workloads on commodity processors

Josue FeliuAjeya NaithaniJulio SahuquilloSalvador PetitMoinuddin QureshiLieven Eeckhout

A1 Artikel in een tijdschrift in IEEE TRANSACTIONS ON COMPUTERS

2021

cactus : top-down GPU-compute benchmarking using real-life applications

Mahmood Naderan-TahanLieven Eeckhout

Reliability-aware garbage collection for hybrid HBM-DRAM memories

Wenjie LiuShoaib AkramJennifer SartorLieven Eeckhout

A1 Artikel in een tijdschrift in ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION

Scale-model simulation

Wenjie LiuWim HeirmanStijn EyermanShoaib AkramLieven Eeckhout

A1 Artikel in een tijdschrift in IEEE COMPUTER ARCHITECTURE LETTERS

TIP : time-proportional instruction profiling

Björn GottschallLieven EeckhoutMagnus Jahre

Vector runahead

Ajeya NaithaniSam AinsworthTimothy M. JonesLieven Eeckhout

2020

A rigorous benchmarking and performance analysis methodology for Python workloads

Arthur CrapéLieven Eeckhout

COPA : highly cost-effective power back-up for green datacenters

Yan YinJunmin WuXu ZhouLieven EeckhoutAmer QounehTao LiZhibin Yu

A1 Artikel in een tijdschrift in IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS

HSM : a hybrid slowdown model for multitasking GPUs

Xia ZhaoMagnus JahreLieven Eeckhout

MDM : the GPU memory divergence model

Lu WangMagnus JahreAlmutaz AdilehoLieven Eeckhout

Modeling and minimizing memory contention in general-purpose GPUs

Lu WangLieven Eeckhout

Precise runahead execution

Ajeya NaithaniJosué Feliu PérezAlmutaz AdilehLieven Eeckhout

Selective replication in memory-side GPU caches

Xia ZhaoMagnus JahreLieven Eeckhout

The forward slice core microarchitecture

Kartik LakshminarasimhanAjeya NaithaniJosué FeliuLieven Eeckhout

Thread isolation to improve symbiotic scheduling on SMT multicore processors

Josue FeliuJulio SahuquilloSalvador PetitLieven Eeckhout

A1 Artikel in een tijdschrift in IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS

2019

Adaptive memory-side last-level GPU caching

Xia ZhaoAlmutaz AdilehZhibin YuZhiying WangAamer JaleelLieven Eeckhout

CD-Xbar : a converge-diverge crossbar network for high-performance GPUs

Xia ZhaoSheng MaZhiying WangNatalie Enright JergerLieven Eeckhout

A1 Artikel in een tijdschrift in IEEE TRANSACTIONS ON COMPUTERS

Crystal gazer : profile-driven write-rationing garbage collection for hybrid memories

Shoaib AkramJennifer SartorKathryn McKinleyLieven Eeckhout

A2 Artikel in een tijdschrift in PROCEEDINGS OF THE ACM ON MEASUREMENT AND ANALYSIS OF COMPUTING SYSTEMS

Directed statistical warming through time traveling

Nikos NikolerisLieven EeckhoutErik HagerstenTrevor E. Carlson

Emulating and evaluating hybrid memory for managed languages on NUMA hardware

Shoaib AkramJennifer SartorKathryn S. McKinleyLieven Eeckhout

Exploiting application diversity in throughput processors

Xia ZhaoLieven Eeckhout

Exploiting managed language semantics to optimize for hardware heterogeneity

Shoaib AkramLieven EeckhoutJ. Sartor

HeteroCore GPU to exploit TLP-resource diversity

Xia ZhaoZhiying WangLieven Eeckhout

A1 Artikel in een tijdschrift in IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS

Improving soft error reliability in modern processors

Ajeya NaithaniLieven Eeckhout

Intra-cluster coalescing and distributed-block scheduling to reduce GPU NoC pressure

Lu WangXia ZhaoDavid R. KaeliZhiying WangLieven Eeckhout

A1 Artikel in een tijdschrift in IEEE TRANSACTIONS ON COMPUTERS

Microarchitecture-independent analytical branch behavior and multi-threaded performance modeling

Sander De PestelLieven Eeckhout

Modeling emerging memory-divergent GPU applications

Lu WangMagnus JahreAlmutaz AdilehZhiying WangLieven Eeckhout

A1 Artikel in een tijdschrift in IEEE COMPUTER ARCHITECTURE LETTERS

Precise runahead execution

Ajeya NaithaniJosue FeliuAlmutaz AdilehLieven Eeckhout

A1 Artikel in een tijdschrift in IEEE COMPUTER ARCHITECTURE LETTERS

Racing to hardware-validated simulation

Almutaz AdilehCecilia González-ÁlvarezJuan Miguel De Haro RuizLieven Eeckhout

RPPM : Rapid Performance Prediction of Multithreaded workloads on multicore processors

Sander De PestelSam Van den SteenShoaib AkramLieven Eeckhout

2018

Approximate computing, intelligent computing

Lieven Eeckhout

Redactioneel materiaal

Architectural support for probabilistic branches

Almutaz AdilehDavid J. LiljaLieven Eeckhout

Automotive computing, neuromorphic computing, and beyond

Lieven Eeckhout

Redactioneel materiaal

Classification-driven search for effective sm partitioning in multitasking GPUs

Xia ZhaoZhiying WangLieven Eeckhout

GDP : using dataflow properties to accurately estimate interference-free performance at runtime

Magnus JahreLieven Eeckhout

Get Out of the Valley: Power-Efficient Address Mapping for GPUs

Yuxi LiuXia ZhaoMagnus JahreZhenlin WangXiaolin WangYingwei LuoLieven Eeckhout

Hardware acceleration and a grateful goodbye

Lieven Eeckhout

Redactioneel materiaal

Lieven Eeckhout

Redactioneel materiaal

Intra-cluster coalescing to reduce GPU NoC pressure

Lu WangXia ZhaoDavid KaeliZhiying WangLieven Eeckhout

Managing hybrid memories by predicting object write intensity

Shoaib AkramKathryn S. McKinleyJennifer B. SartorLieven Eeckhout

Maximizing heterogeneous processor performance under power constraints

Almutaz AdilehLieven Eeckhout

Memristors and more

Lieven Eeckhout

Redactioneel materiaal

MIA : metric importance analysis for big data workload characterization

Zhibin YuWen XiongLieven EeckhoutZhendong BeiAvi MendelsonChengzhong Xu

A1 Artikel in een tijdschrift in IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS

Microarchitecture-independent analytical processor performance and power modeling

Sam Van den SteenLieven Eeckhout

Modeling superscalar processor memory-level parallelism

Sam Van den SteenLieven Eeckhout

A1 Artikel in een tijdschrift in IEEE COMPUTER ARCHITECTURE LETTERS

Moore's law and ultra-low-power processors

Lieven Eeckhout

Redactioneel materiaal

Optimizing soft error reliability through scheduling on heterogeneous multicore processors

Ajeya NaithaniStijn EyermanLieven Eeckhout

A1 Artikel in een tijdschrift in IEEE TRANSACTIONS ON COMPUTERS

QIG : quantifying the importance and interaction of GPGPU architecture parameters

Zhibin YuJing WangLieven EeckhoutChengzhong Xu

A1 Artikel in een tijdschrift in IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS

RPPM : rapid performance prediction of multithreaded applications on multicore hardware

Sander De PestelSam Van den SteenShoaib AkramLieven Eeckhout

A1 Artikel in een tijdschrift in IEEE COMPUTER ARCHITECTURE LETTERS

Lieven Eeckhout

Redactioneel materiaal

2017

Analyzing the scalability of managed language applications with speedup stacks

Jennifer B. SartorKristof Du BoisStijn EyermanLieven Eeckhout

Application clustering policies to address system fairness with Intel’s cache allocation technology

Vicent Selfa OliverJulio SahuquilloLieven EeckhoutSalvador PetitMaria E. Gomez

BACM : barrier-aware cache management for irregular memory-intensive GPGPU workloads

Yuxi LiuXia ZhaoZhibin YuZhenlin WangXiaolin WangYingwei LuoLieven Eeckhout

DEP+BURST : online DVFS performance prediction for energy-efficient managed language execution

Shoaib AkramJennifer SartorLieven Eeckhout

A1 Artikel in een tijdschrift in IEEE TRANSACTIONS ON COMPUTERS

Improving IBM POWER8 performance through symbiotic job scheduling

Josue FeliuStijn EyermanJulio SahuquilloSalvador PetitLieven Eeckhout

A1 Artikel in een tijdschrift in IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS

LA-LLC : inter-core locality-aware last-level cache to exploit many-to-many traffic in GPGPUs

Xia ZhaoYuxi LiuAlmutaz AdilehLieven Eeckhout

A1 Artikel in een tijdschrift in IEEE COMPUTER ARCHITECTURE LETTERS

Linear branch entropy : characterizing and optimizing branch behavior in a micro-architecture independent way

Sander De PestelStijn EyermanLieven Eeckhout

A1 Artikel in een tijdschrift in IEEE TRANSACTIONS ON COMPUTERS

Mind the power holes : sifting operating points in power-limited heterogeneous multicores

Almutaz AdilehStijn EyermanAamer JaleelLieven Eeckhout

A1 Artikel in een tijdschrift in IEEE COMPUTER ARCHITECTURE LETTERS

Shared resource aware scheduling on power-constrained tiled many-core processors

Sudhanshu Shekhar JhaWim HeirmanAyose FalconJordi TubellaAntonio GonzalezLieven Eeckhout

A1 Artikel in een tijdschrift in JOURNAL OF PARALLEL AND DISTRIBUTED COMPUTING

2016

A heterogeneous low-cost and low-latency Ring-Chain network for GPGPUs

Xia ZhaoSheng MaChen LiLieven EeckhoutZhiying Wang

A low-cost conflict-free NoC for GPGPUs

Xia ZhaoSheng MaYuxi LiuLieven EeckhoutZhiying Wang

Analytical processor performance and power modeling using micro-architecture independent characteristics

Sam Van den SteenStijn EyermanSander De PestelMoncef MechriTrevor CarlsonDavid Black-SchafferErik HagerstenLieven Eeckhout

A1 Artikel in een tijdschrift in IEEE TRANSACTIONS ON COMPUTERS

Barrier-aware warp scheduling for throughput processors

Yuxi LiuZhibin YuLieven EeckhoutVijay Janapa ReddiYingwei LuoXiaolin WangZhenlin WangChengzhong Xu

Boosting the priority of garbage: scheduling collection on heterogeneous multicore processors

Shoaib AkramJennifer SartorKenzo Van CraeynestWim HeirmanLieven Eeckhout

A1 Artikel in een tijdschrift in ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION

DVFS performance prediction for managed multithreaded applications

Shoaib AkramJennifer SartorLieven Eeckhout

Maximizing heterogeneous processor performance under power constraints

Almutaz AdilehStijn EyermanAamer JaleelLieven Eeckhout

A1 Artikel in een tijdschrift in ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION

MInGLE: an efficient framework for domain acceleration using low-power specialized functional units

Cecilia González-ÁlvarezJennifer SartorCarlos ÀlvarezDaniel Jimènez-GonzàlezLieven Eeckhout

A1 Artikel in een tijdschrift in ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION

RFHOC: a random-forest approach to auto-tuning Hadoop's configuration

Zhendong BeiZhibin YuHuiling ZhangWen XiongChengzhong XuLieven EeckhoutShengzhong Feng

A1 Artikel in een tijdschrift in IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS

Shared resource aware scheduling on power-constrained tiled many-core processors

Sudhanshu JhaWim HeirmanAyose FalconJordi TubellaAntonio GonzalezLieven Eeckhout

ShenZhen transportation system (SZTS): a novel big data benchmark suite

Wen XiongZhibin YuLieven EeckhoutZhengdong BeiFan ZhangChengzhong Xu

A1 Artikel in een tijdschrift in JOURNAL OF SUPERCOMPUTING

The truth, the whole truth, and nothing but the truth : a pragmatic guide to assessing empirical evaluations

Stephen M BlackburnAmer DiwanMatthias HauswirthPeter F SweeneyJose Nelson AmaralTim BrechtLubomir BulejCliff ClickLieven EeckhoutSebastian Fischmeister et al.

A1 Artikel in een tijdschrift in ACM TRANSACTIONS ON PROGRAMMING LANGUAGES AND SYSTEMS

Thread similarity matrix: visualizing branch divergence in GPGPU programs

Zhibin YuLieven EeckhoutChengzhong Xu

Two-level hybrid sampled simulation of multithreaded applications

Chuntao JiangZhibin YuLieven EeckhoutHai JinXiaofei LiaoCheng-Zhong Xu

A1 Artikel in een tijdschrift in ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION

2015

Automated design of domain-specific custom instructions

Cecilia González-ÁlvarezLieven EeckhoutDaniel Jiménez-GonzálezCarlos Álvarez Martinez

Automatic design of domain-specific instructions for low-power processors

Cecilia González-ÁlvarezJennifer SartorCarlos AlvarezDaniel Jimenez-GonzalezLieven Eeckhout

Building on 35 years toward a vibrant future

Lieven Eeckhout

Redactioneel materiaal

Chrysso: an integrated power manager for constrained many-core processors

Sudhanshu JhaWim HeirmanAyose FalconTrevor CarlsonKenzo Van CraeynestJordi TubellaAntonio GonzalezLieven Eeckhout

GPGPU-MiniBench: accelerating GPGPU micro-architecture simulation

Zhibin YuLieven EeckhoutNilanjan GoswamiTao LiLizy K JohnHai JinCheng-Zhong XuJunmin Wu

A1 Artikel in een tijdschrift in IEEE TRANSACTIONS ON COMPUTERS

Heterogeneity in response to the power wall

Lieven Eeckhout

Redactioneel materiaal

Hot chips in an increasingly diverse microprocessor landscape

Lieven Eeckhout

Redactioneel materiaal

Mechanistic analytical modeling of superscalar in-order processor performance

Maximilien BreugheStijn EyermanLieven Eeckhout

A1 Artikel in een tijdschrift in ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION

Mechanistic modeling of architectural vulnerability factor

Arun NairStijn EyermanJian ChenLizy JohnLieven Eeckhout

A1 Artikel in een tijdschrift in ACM TRANSACTIONS ON COMPUTER SYSTEMS

Micro-architecture independent analytical processor performance and power modeling

Sam Van den SteenSander De PestelMoncef MechriStijn EyermanTrevor CarlsonDavid Black-SchafferErik HagerstenLieven Eeckhout

Micro-architecture independent branch behavior modeling

Sander De PestelStijn EyermanLieven Eeckhout

Performance evaluation and its impact on design

Lieven Eeckhout

Redactioneel materiaal

Practical iterative optimization for the data center

Shuangde FangWenwen XuYang ChenLieven EeckhoutOlivier TemamYunji ChenChengyong WuXiaobing Feng

A1 Artikel in een tijdschrift in ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION

Proceedings of the 21st IEEE International Symposium on High Performance Computer Architecture (HPCA)

Shorter on-line warmup for sampled simulation of multi-threaded applications

Chuntao JiangZhibin YuHai JinXiaofei LiaoLieven EeckhoutYonggang ZengCheng-Zhong Xu

SZTS: a novel big data transportation system Benchmark suite

Wen XiongZhibin YuLieven EeckhoutZhengdong BeiFan ZhangCheng-Zhong Xu

The load slice core microarchitecture

Trevor CarlsonWim HeirmanOsman AllamStefanos KaxirasLieven Eeckhout

The state of the computer architecture field and its top picks

Lieven Eeckhout

Redactioneel materiaal

The structure of computer architecture (r)evolution

Lieven Eeckhout

Redactioneel materiaal

2014

An evaluation of high-level mechanistic core models

Trevor CarlsonWim HeirmanStijn EyermanIbrahim HurLieven Eeckhout

A1 Artikel in een tijdschrift in ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION

Automatic SMT threading for OpenMP applications on the Intel Xeon Phi co-processor

Wim HeirmanTrevor E CarlsonKenzo Van CraeynestIbrahim HurAamer JaleelLieven Eeckhout

BarrierPoint: sampled simulation of multi-threaded applications

Trevor CarlsonWim HeirmanKenzo Van CraeynestLieven Eeckhout

Cooperative cache scrubbing

Jennifer SartorWim HeirmanStephen M. BlackburnLieven EeckhoutKathryn S McKinley

Efficient design space exploration of embedded microprocessors

Maximilien BreugheLieven EeckhoutStijn Eyerman

Efficient, accurate and reproducible simulation of multi-threaded workloads

Trevor CarlsonWim HeirmanHarish PatilLieven Eeckhout

Node performance and energy analysis with the sniper multi-core simulator

Trevor CarlsonWim HeirmanKenzo Van CraeynestLieven Eeckhout

Hoofdstuk in een boek in Tools for high performance computing 2013

Performance analysis methods for understanding scaling bottlenecks in multi-threaded applications

Kristof Du BoisLieven EeckhoutStijn Eyerman

Performance portability across heterogeneous SoCs using a generalized library-based approach

Shuangde FangZidong DuYuntan FangYuanjie HuangYang ChenLieven EeckhoutOlivier TemamHuawei LiYunji ChenChengyong Wu

A1 Artikel in een tijdschrift in ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION

Speeding up architectural simulation through high-level core abstractions and sampling

Trevor CarlsonLieven Eeckhout

The benefit of SMT in the multi-core era: flexibility towards degrees of thread-level parallelism

Stijn EyermanLieven Eeckhout

A1 Artikel in een tijdschrift in Proceedings of the 19th international conference on Architectural support for programming languages and operating systems

Undersubscribed threading on clustered cache architectures

Wim HeirmanTrevor CarlsonKenzo Van CraeynestIbrahim HurAamer JaleelLieven Eeckhout

2013

Accelerating an application domain with specialized functional units

Cecilia González-ÁlvarezJennifer SartorCarlos AlvarezDaniel Jimenez-GonzalezLieven Eeckhout

A1 Artikel in een tijdschrift in ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION

Accelerating GPGPU architecture simulation

Zhibin YuLieven EeckhoutNilanjan GoswaniTao LiLizy Kurian JohnHai JinCheng-Zhong Xu

Bottle graphs: visualizing scalability bottlenecks in multi-threaded applications

Kristof Du BoisJennifer SartorStijn EyermanLieven Eeckhout

A1 Artikel in een tijdschrift in ACM SIGPLAN NOTICES

Criticality stacks: identifying critical threads in parallel programs using synchronization behavior

Kristof Du BoisStijn EyermanJennifer SartorLieven Eeckhout

Fairness-aware scheduling on single-ISA heterogeneous multi-cores

Kenzo Van CraeynestShoaib AkramWim HeirmanAamer JaleelLieven Eeckhout

Modeling and scheduling heterogeneous multi-core architectures

Kenzo Van CraeynestLieven Eeckhout

Node performance and energy analysis with the sniper multi-core simulator

Trevor CarlsonWim HeirmanKenzo Van CraeynestLieven Eeckhout

PCantorSim: accelerating parallel architecture simulation through fractal-based sampling

Chuntao JiangZhibin YuHai JinChengzhong XuLieven EeckhoutWim HeirmanTrevor CarlsonXiaofei Liao

A1 Artikel in een tijdschrift in ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION

Per-thread cycle accounting in multicore processors

Kristof Du BoisStijn EyermanLieven Eeckhout

A1 Artikel in een tijdschrift in ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION

Proceedings of the Eleventh IEEE/ACM International Symposium on Code Generation and Optimization (CGO 2013)

Restating the case for weighted-IPC metrics to evaluate multiprogram workload performance

Stijn EyermanLieven Eeckhout

A1 Artikel in een tijdschrift in IEEE COMPUTER ARCHITECTURE LETTERS

Sampled simulation of multi-threaded applications

Trevor CarlsonWim HeirmanLieven Eeckhout

Selecting representative benchmark inputs for exploring microprocessor design spaces

Maximilien BreugheLieven Eeckhout

A1 Artikel in een tijdschrift in ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION

Simulating and analyzing commercial workloads and computer systems

Frederick RyckboschLieven Eeckhout

Understanding fundamental design choices in single-ISA heterogeneous multicore architectures

Kenzo Van CraeynestLieven Eeckhout

A1 Artikel in een tijdschrift in ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION

Workload characterization and synthesis for data center optimization

Stijn PolflietLieven Eeckhout

2012

A first-order mechanistic model for architectural vulnerability factor

Arun Arvind NairStijn EyermanLieven EeckhoutLizy Kurian John

A mechanistic performance model for superscalar in-order processors

Maximilien BreugheStijn EyermanLieven Eeckhout

An efficient CPI stack counter architecture for superscalar processors

Osman AllamStijn EyermanLieven Eeckhout

Deconstructing iterative optimization

Yang ChenShuangde FangYuanjie HuangLieven EeckhoutGrigori FursinOlivier TemamChengyong Wu

A1 Artikel in een tijdschrift in ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION

Exploiting media stream similarity for energy-efficient decoding and resource prediction

Juan HamersLieven Eeckhout

A1 Artikel in een tijdschrift in ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS

Exploring multi-threaded Java application performance on multicore hardware

Jennifer SartorLieven Eeckhout

A1 Artikel in een tijdschrift in ACM SIGPLAN NOTICES

Iterative optimization for the data center

Yang ChenShuangde FangLieven EeckhoutOlivier TemamChengyong Wu

A1 Artikel in een tijdschrift in ACM SIGPLAN NOTICES

Power aware early design stage hardware software co-optimization

Souradip SarkarWim HeirmanTrevor CarlsonLieven Eeckhout

Power-aware multi-core simulation for early design stage hardware/software co-optimization

Wim HeirmanSouradip SarkarTrevor CarlsonIbrahim HurLieven Eeckhout

Probabilistic modeling for job symbiosis scheduling on SMT processors

Stijn EyermanLieven Eeckhout

A1 Artikel in een tijdschrift in ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION

Scheduling heterogeneous multi-cores through performance impact estimation (PIE)

Kenzo Van CraeynestAamer JaleelLieven EeckhoutPaolo NarvaezJoel S Emer

Sniper: scalable and accurate parallel multi-core simulation

Wim HeirmanTrevor CarlsonLieven Eeckhout

Speedup stacks: identifying scaling Bottlenecks in multi-threaded applications

Stijn EyermanKristof Du BoisLieven Eeckhout

Studying hardware and software trade-offs for a real-life web 2.0 workload

Stijn PolflietFrederick RyckboschLieven Eeckhout

SWAP: parallelization through algorithm substitution

Hengjie LiWenting HeYang ChenLieven EeckhoutOlivier TemamChengyong Wu

A1 Artikel in een tijdschrift in IEEE MICRO

VSim: simulating multi-server setups at near native hardware speed

Frederick RyckboschStijn PolflietLieven Eeckhout

A1 Artikel in een tijdschrift in ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION

Workload generation for microprocessor performance evaluation

Luk Van ErtveldeLieven Eeckhout

2011

Automated full-system power characterization

Stijn PolflietFrederick RyckboschLieven Eeckhout

A1 Artikel in een tijdschrift in IEEE MICRO

Evaluating application vulnerability to soft errors in multi-level cache hierarchy

Zhe MaTrevor CarlsonWim HeirmanLieven Eeckhout

Fine-grained DVFS using on-chip regulators

Stijn EyermanLieven Eeckhout

A1 Artikel in een tijdschrift in ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION

How sensitive is processor customization to the workload's input datasets?

Maximilien BreugheLi ZhengYang ChenStijn EyermanOlivier TemamChengyong WuLieven Eeckhout

Mechanistic-empirical processor performance modeling for constructing CPI stacks on real hardware

Stijn EyermanKenneth HosteLieven Eeckhout

Optimizing the datacenter for data-centric workloads

Stijn PolflietFrederick RyckboschLieven Eeckhout

Ranking commercial machines through data transposition

Beau PiccartAndy GeorgesHendrik BlockeelLieven Eeckhout

Sniper: exploring the level of abstraction for scalable and accurate parallel multi-core simulation

Trevor CarlsonWim HeirmanLieven Eeckhout

SWEEP: evaluating computer system energy efficiency using synthetic workloads

Kristof Du BoisTim SchaepsStijn PolflietFrederick RyckboschLieven Eeckhout

The multi-program performance model: debunking current practice in multi-core simulation

Kenzo Van CraeynestLieven Eeckhout

Trends in server energy proportionality

Frederick RyckboschStijn PolflietLieven Eeckhout

A1 Artikel in een tijdschrift in COMPUTER

Using cycle stacks to understand scaling bottlenecks in multi-threaded workloads

Wim HeirmanTrevor CarlsonShuai CheKevin SkadronLieven Eeckhout

Using fast and accurate simulation to explore hardware/software trade-offs in the multi-core era

Wim HeirmanTrevor CarlsonSouradip SarkarPieter GhyselsWim VanrooseLieven Eeckhout

Virtual Manycore platforms : moving towards 100+ processor cores

Rainer LeupersLieven EeckhoutGrant MartinFrank SchirrmeisterNigel TophamXiaotao Chent

2010

2010 IEEE International symposium on Performance Analysis of Systems and Software

A counter architecture for online DVFS profitability estimation

Stijn EyermanLieven Eeckhout

A1 Artikel in een tijdschrift in IEEE TRANSACTIONS ON COMPUTERS

Automated just-in-time compiler tuning

Kenneth HosteAndy GeorgesLieven Eeckhout

AVF stressmark: towards an automated methodology for bounding the worst-case vulnerability to soft errors

Arun Arvind NairLizy Kurian JohnLieven Eeckhout

Benchmark synthesis for architecture and compiler exploration

Luk Van ErtveldeLieven Eeckhout

Computer architecture performance evaluation methods

Lieven Eeckhout

Evaluating iterative optimization across 1000 data sets

Yang ChenYuanjie HuangLieven EeckhoutGrigori FursinLiang PengOlivier TemamChengyong Wu

A1 Artikel in een tijdschrift in ACM SIGPLAN NOTICES

Fast simulation techniques for microprocessor design space exploration

Davy GenbruggeLieven Eeckhout

Fast, accurate and validated full-system software simulation of x86 hardware

Frederick RyckboschStijn PolflietLieven Eeckhout

A1 Artikel in een tijdschrift in IEEE MICRO

Interval simulation: raising the level of abstraction in architectural simulation

Davy GenbruggeStijn EyermanLieven Eeckhout

Modeling critical sections in Amdahl's law and its implications for multicore design

Stijn EyermanLieven Eeckhout

Per-thread cycle accounting

Stijn EyermanLieven Eeckhout

A1 Artikel in een tijdschrift in IEEE MICRO

Performance metrics for consolidated servers

Andy GeorgesLieven Eeckhout

Probabilistic job symbiosis modeling for SMT processor scheduling

Stijn EyermanLieven Eeckhout

A1 Artikel in een tijdschrift in ACM SIGPLAN NOTICES

Scenario-based resource prediction for QoS-aware media processing

Juan HamersLieven Eeckhout

A1 Artikel in een tijdschrift in COMPUTER

Statistical simulation

Lieven EeckhoutDavy Genbrugge

Hoofdstuk in een boek in Processor and System-on-Chip Simulation

Workload reduction and generation techniques

Luk Van ErtveldeLieven Eeckhout

A1 Artikel in een tijdschrift in IEEE MICRO

2009

A mechanistic performance model for superscalar out-of-order processors

Stijn EyermanLieven EeckhoutTejas KarkhanisJames E Smith

A1 Artikel in een tijdschrift in ACM TRANSACTIONS ON COMPUTER SYSTEMS

A methodology for analyzing commercial processor performance numbers

Kenneth HosteLieven Eeckhout

A1 Artikel in een tijdschrift in COMPUTER

Chip multiprocessor design space exploration through statistical simulation

Davy GenbruggeLieven Eeckhout

A1 Artikel in een tijdschrift in IEEE TRANSACTIONS ON COMPUTERS

Finding extreme behaviors in microprocessor workloads

Frederik VandeputteLieven Eeckhout

A2 Artikel in een tijdschrift in TRANSACTIONS ON HIGH-PERFORMANCE EMBEDDED ARCHITECTURES AND COMPILERS

Finding stress patterns in microprocessor workloads

Frederik VandeputteLieven Eeckhout

ISPASS 2009: IEEE International symposium on Performance Analysis of Systems and Software

Memory-level parallelism aware fetch policies for simultaneous multithreading processors

Stijn EyermanLieven Eeckhout

A1 Artikel in een tijdschrift in ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION

MLP-Aware runahead threads in a simultaneous multithreading processor

Kenzo Van CraeynestStijn EyermanLieven Eeckhout

Per-thread cycle accounting in SMT processors

Stijn EyermanLieven Eeckhout

A1 Artikel in een tijdschrift in ACM SIGPLAN NOTICES

Raising the level of abstraction in architectural simulation

Davy GenbruggeStijn EyermanLieven Eeckhout

Raising the level of abstraction in architectural simulation

Davy GenbruggeStijn EyermanLieven Eeckhout

System-scenario-based design of dynamic embedded systems

Stefan Valentin GheorghitaMartin PalkovicJuan HamersArnout VandecappelleMamagkakis SteliosTwan BastenLieven EeckhoutHenk CorporaalFrancky CatthoorFrederik Vandeputte et al.

A1 Artikel in een tijdschrift in ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS

2008

Accurate and efficient cache warmup for sampled processor simulation through NSL-BLRL

Luk Van ErtveldeFilip HellebautLieven Eeckhout

A1 Artikel in een tijdschrift in COMPUTER JOURNAL

Automated Hardware-Independent Scenario Identification

Juan HamersLieven Eeckhout

Automated microprocessor stressmark generation

Ajay JoshiLieven EeckhoutLizy K JohnCiji Isen

Characterizing the Unique and Diverse Behaviors in Existing and Emerging General-Purpose and Domain-Specific Benchmark Suites

Kenneth HosteLieven Eeckhout

COLE: Compiler Optimization Level Exploration

Kenneth HosteLieven Eeckhout

Dispersing proprietary applications as benchmarks through code mutation

Luk Van ErtveldeLieven Eeckhout

A1 Artikel in een tijdschrift in ACM SIGPLAN NOTICES

Distilling the essence of proprietary workloads into miniature benchmarks

Ajay JoshiLieven EeckhoutRobert BellLizy John

A1 Artikel in een tijdschrift in ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION

Java Performance Evaluation through Rigorous Replay Compilation

Andy GeorgesLieven EeckhoutDries Buytaert

A1 Artikel in een tijdschrift in ACM SIGPLAN NOTICES

Memory data flow Modeling in statistical simulation for the efficient exploration of microprocessor design spaces

Davy GenbruggeLieven Eeckhout

A1 Artikel in een tijdschrift in IEEE TRANSACTIONS ON COMPUTERS

Phase Complexity Surfaces: Characterizing Time-Varying Program Behavior

Frederik VandeputteLieven Eeckhout

Profileringstechnieken voor prestatieanalyse en optimalisatie van Javaprogramma's

Dries BuytaertKoen De BosschereLieven Eeckhout

Sampled processor simulation: a survey

Lieven Eeckhout

A1 Artikel in een tijdschrift in ADVANCES IN COMPUTERS

Statistical Simulation of DRAM

Davy GenbruggeLieven Eeckhout

Studying Compiler Optimizations on Superscalar Processors through Interval Analysis

Stijn EyermanLieven EeckhoutJames E. Smith

System-level performance metrics for multiprogram workloads

Stijn EyermanLieven Eeckhout

A1 Artikel in een tijdschrift in IEEE MICRO

The Return of Synthetic Benchmarks

Ajay JoshiLieven EeckhoutLizy John

Three pitfalls in Java performance evaluation

Andy GeorgesKoen De BosschereLieven Eeckhout

2007

A memory-level parallelism aware fetch policy for SMT processors

Stijn EyermanLieven Eeckhout

A top-down approach to architecting CPI component performance counters

Stijn EyermanLieven EeckhoutT KARKHANISJE SMITH

A1 Artikel in een tijdschrift in IEEE MICRO

Adding Rigorous Statistics to the Java Benchmarker's Toolbox

Andy GeorgesD BUYTAERTLieven Eeckhout

Analyzing Commercial Processor Performance Numbers for Predicting Performance of Applications of Interest

Kenneth HosteLieven EeckhoutH BLOCKEEL

Branch history matching: Branch predictor warmup for sampled simulation

Simon KluyskensLieven Eeckhout

Branch Predictor Warmup for Sampled Simulation through Branch History Matching

S KLUYSKENSLieven Eeckhout

Characterization and reduction of memory usage in 64-bit Java Virtual Machines

Kris VenstermansKoen De BosschereLieven Eeckhout

Exploiting program phase behavior for energy reduction on multi-configuration processors

Frederik VandeputteLieven EeckhoutKoen De Bosschere

A1 Artikel in een tijdschrift in JOURNAL OF SYSTEMS ARCHITECTURE

Exploiting video stream similarity for energy-efficient decoding

Juan HamersLieven EeckhoutKoen De Bosschere

Exploring the Application Behavior Space Using Parameterized Synthetic Benchmarks

A JOSHILieven EeckhoutL JOHN

GCH: hints for triggering garbage collections

Dries BuytaertKris VenstermansLieven EeckhoutKoen De Bosschere

Java object header elimination for reduced memory consumption in 64-bit virtual machines

Kris VenstermansLieven EeckhoutKoen De Bosschere

A1 Artikel in een tijdschrift in ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION

Microarchitecture-independent workload characterization

Kenneth HosteLieven Eeckhout

A1 Artikel in een tijdschrift in IEEE Micro

Object-relative addressing: Compressed pointers in 64-bit Java virtual machines

Kris VenstermansLieven EeckhoutKoen De Bosschere

Proceedings of the 10th Workshop on Computer Architecture Evaluation using Commercial Workloads (CAECW) held in conjunction with the 13th International Symposium on High-Performance Computer Architecture (HPCA)

R IYERLieven Eeckhout

Representative Multiprogram Workloads for Multithreaded Processor Simulation

M VAN BIESBROUCKLieven EeckhoutB CALDER

Resource prediction for media stream decoding

Juan HamersLieven Eeckhout

Statistical simulation for exploring the chip multiprocessor cache design space

Davy GenbruggeLieven Eeckhout

Statistical simulation for exploring the chip multiprocessor cache design space

Davy GenbruggeLieven Eeckhout

Statistical Simulation of Chip Multiprocessors Running Multi-Program Workloads

Davy GenbruggeLieven Eeckhout

Statistically Rigorous Java Performance Evaluation

Andy GeorgesDries BuytaertLieven Eeckhout

A1 Artikel in een tijdschrift in ACM SIGPLAN NOTICES

Studying Compiler-Microarchitecture Interactions through Interval Analysis

Stijn EyermanLieven EeckhoutJ SMITH

Towards an Automatic Benchmark Generation Method

Luk Van ErtveldeLieven Eeckhout

Using HPM-sampling to drive dynamic compilation

Dries BuytaertAndy GeorgesMichael HindMatthew ArnoldLieven EeckhoutKoen De Bosschere

A1 Artikel in een tijdschrift in ACM SIGPLAN NOTICES

2006

64-bit versus 32-bit virtual machines for Java

Kris VenstermansLieven EeckhoutKoen De Bosschere

A1 Artikel in een tijdschrift in SOFTWARE-PRACTICE & EXPERIENCE

A performance counter architecture for computing accurate CPI components

Stijn EyermanLieven EeckhoutTejas KarkhanisJames E Smith

A1 Artikel in een tijdschrift in ACM SIGPLAN NOTICES

A performance counter architecture for computing accurate CPI components

Stijn EyermanLieven EeckhoutTejas KarkhanisJames E Smith

Accurate Memory Data Flow Modeling in Statistical Simulation

Davy GenbruggeLieven EeckhoutKoen De Bosschere

An analysis of program phase behavior and its predictability

Frederik VandeputteLieven EeckhoutKoen De Bosschere

Analyzing the Processor Bottlenecks in SPEC CPU2000

J YIA JOSHIR SENDAGLieven EeckhoutD LILJA

Automatic Generation of Synthetic Benchmarks

Luk Van ErtveldeLieven EeckhoutKoen De Bosschere

Benchmark Selection

Lieven Eeckhout

Hoofdstuk in een boek in Performance Evaluation and Benchmarking

Building Java Program Analysis Tools using Javana

Dries BuytaertJonas MaebeLieven EeckhoutKoen De Bosschere

Characterizing the branch misprediction penalty

Stijn EyermanJames E SmithLieven Eeckhout

Comparing benchmarks using key microarchitecture-independent characteristics

Kenneth HosteLieven Eeckhout

Considering all starting points for simultaneous multithreading simulation

M VAN BIESBROUCKLieven EeckhoutB CALDER

Efficient design space exploration of high performance embedded out-of-order processors

Stijn EyermanLieven EeckhoutKoen De Bosschere

Efficient sampling startup for SimPoint

M VAN BIESBROUCKB CALDERLieven Eeckhout

A1 Artikel in een tijdschrift in IEEE MICRO

Evaluating benchmark subsetting approaches

JJ YIR SENDAGLieven EeckhoutA JOSHIDJ LILJALK JOHNS

Evaluating the efficacy of statistical simulation for design space exploration

A JOSHIJJ YIRH BELLLieven EeckhoutL JOHND LIJA

Identifying Program Phase Behavior in Parallel Programs on Distributed Shared-memory Systems

Frederik VandeputteLieven EeckhoutKoen De BosschereWim Heirman

Identifying Program Phase Transition Points

Frederik VandeputteLieven EeckhoutKoen De Bosschere

Identifying the Best Performing Hardware Platform Based on Inherent Program Similarity

Kenneth HosteLieven EeckhoutAndy GeorgesKoen De Bosschere

Improved composite confidence mechanisms for a perceptron branch predictor

Veerle DesmetLieven EeckhoutKoen De Bosschere

A1 Artikel in een tijdschrift in JOURNAL OF SYSTEMS ARCHITECTURE

Javana: a system for building customized Java program analysis tools

Jonas MaebeDries BuytaertLieven EeckhoutKoen De Bosschere

Javana: a system for building customized Java program analysis tools

Jonas MaebeDries BuytaertLieven EeckhoutKoen De Bosschere

A1 Artikel in een tijdschrift in ACM SIGPLAN NOTICES

Measuring benchmark similarity using inherent program characteristics

A JOSHIA PHANSALKARLieven EeckhoutK JOHN

A1 Artikel in een tijdschrift in IEEE TRANSACTIONS ON COMPUTERS

Microarchitecture-Independent Cache Modeling for Statistical Simulation

Davy GenbruggeLieven EeckhoutKoen De Bosschere

NSL-BLRL: Efficient cache warm'up for sampled processor simulation

Luk Van ErtveldeFilip HellebautLieven EeckhoutKoen De Bosschere

NSL-BLRL: Efficient Cache Warmup for Sampled Processor Simulation

Luk Van ErtveldeFilip HellebautLieven EeckhoutKoen De Bosschere

Pattern-driven prefetching for multimedia applications on embedded processors

H SBEYTIS NIARLieven Eeckhout

A1 Artikel in een tijdschrift in JOURNAL OF SYSTEMS ARCHITECTURE

Performance cloning: A technique for disseminating proprietary applications as benchmarks

A JOSHILieven EeckhoutRH BELLL JOHN

Performance Evaluation and Benchmarking

Performance prediction based on inherent program similarity

Kenneth HosteAashish PhansalkarLieven EeckhoutAndy GeorgesLizy K JohnKoen De Bosschere

Proceedings of the 9th Workshop on Computer Architecture Evaluation using Commercial Workloads (CAECW-9) held in conjunction with the 12th International Symposium on High Performance Computer Architecture (HPCA-12).

R IYERLieven Eeckhout

Proceedings of the Second Annual Workshop on Modeling, Benchmarking and Simulation (MoBS) held in conjunction with the 33rd Annual International Symposium on Computer Architecture (ISCA-33)

Space-efficient 64-bit java objects through selective typed virtual addressing

Kris VenstermansLieven EeckhoutKoen De Bosschere

Statistical Simulation

Lieven Eeckhout

Hoofdstuk in een boek in Performance Evaluation and Benchmarking

Statistical Simulation of Chip Multiprocessors

Davy GenbruggeLieven EeckhoutKoen De Bosschere

The Exigency of Benchmark and Compiler Drift: Designing Tomorrow`s Processors with Yesterday`s Tools

J YIHans VandierendonckLieven EeckhoutD LILJA

The future of simulation: A field of dreams?

JJ YILieven EeckhoutDJ LILJAB CALDERLK JOHNJE SMITH

A1 Artikel in een tijdschrift in COMPUTER

The pitfall in comparing benchmarks using hardware performance counters

Kenneth HosteLieven Eeckhout

Using Statistical Simulation for Studying Compiler-Microarchitecture Interactions

Lieven EeckhoutJ CAVAZOS

Yet shorter warmup by combining no-state-loss and MRRL for sampled LRU cache simulation

Lieven EeckhoutKoen De Bosschere

A1 Artikel in een tijdschrift in JOURNAL OF SYSTEMS AND SOFTWARE

2005

A detailed study on phase predictors

Frederik VandeputteLieven EeckhoutKoen De Bosschere

A1 Artikel in een tijdschrift in LECTURE NOTES IN COMPUTER SCIENCE

Accurate statistical approaches for generating representative workload compositions

Lieven EeckhoutR SundareswaraJ YiD LiljaP Schrater

BLRL: Accurate and efficient warmup for sampled processor simulation

Lieven EeckhoutY LUOKoen De BosschereLK JOHN

A1 Artikel in een tijdschrift in COMPUTER JOURNAL

Comparing low-level behavior of SPEC CPU and Java workloads

Andy GeorgesLieven EeckhoutKoen De Bosschere

A1 Artikel in een tijdschrift in LECTURE NOTES IN COMPUTER SCIENCE

Efficient sampling startup for sampled processor simulation

Michael VanBiesbrouckLieven EeckhoutBrad Calder

A1 Artikel in een tijdschrift in LECTURE NOTES IN COMPUTER SCIENCE

Enhanced Statistical Simulation Framework: Accurate Memory Data Flow Model

Davy GenbruggeLieven EeckhoutKoen De Bosschere

Exploiting program microarchitecture independent characteristics and phase behavior for reduced benchmark suite simulation

Lieven EeckhoutJ SampsonB Calder

Garbage collection hints

Dries BuytaertKris VenstermansLieven EeckhoutKoen De Bosschere

A1 Artikel in een tijdschrift in LECTURE NOTES IN COMPUTER SCIENCE

Implicit Typing for 64-bit object header reduction in Java

Kris VenstermansLieven EeckhoutKoen De Bosschere

Improving Accuracy for Statistical Simulation

Davy GenbruggeLieven EeckhoutKoen De Bosschere

Java objects without the headers

Kris VenstermansLieven EeckhoutKoen De Bosschere

Measuring program similarity: Experiments with SPEC CPU benchmark suites

A PHANSALKARA JOSHILieven EeckhoutLK JOHN

Middleware benchmarking: approaches, results, experiences

P BREBNERE CECCHETJ MARGUERITEP TUMAO CIUHANDUB DUFOURLieven EeckhoutS FRENOTAS KRISHNAJ MURPHY et al.

A1 Artikel in een tijdschrift in CONCURRENCY AND COMPUTATION-PRACTICE & EXPERIENCE

Offline phase analysis and optimization for multi-configuration processors

Frederik VandeputteLieven EeckhoutKoen De Bosschere

A1 Artikel in een tijdschrift in LECTURE NOTES IN COMPUTER SCIENCE

Optimal sample length for efficient cache simulation

Lieven EeckhoutS NIARKoen De Bosschere

A1 Artikel in een tijdschrift in JOURNAL OF SYSTEMS ARCHITECTURE

Performance Prediction for Java Applications

Andy GeorgesDries BuytaertKris VenstermansLieven EeckhoutKoen De Bosschere

Program Phase Behavior and Predictability

Frederik VandeputteLieven EeckhoutKoen De Bosschere

SMA: A self-monitored adaptive cache warm-up scheme for microprocessor simulation

Y LUOLK JOHNLieven Eeckhout

A1 Artikel in een tijdschrift in INTERNATIONAL JOURNAL OF PARALLEL PROGRAMMING

The shape of the processor design space and its implications for early stage explorations

Stijn EyermanLieven EeckhoutKoen De Bosschere

Using decision trees to improve program-based and profile-based static branch prediction

Veerle DesmetLieven EeckhoutKoen De Bosschere

A1 Artikel in een tijdschrift in LECTURE NOTES IN COMPUTER SCIENCE

2004

Adaptive prefetching for multimedia applications in embedded systems

H SBEYTIS NIARLieven Eeckhout

Bottleneck Analysis in Java Workloads using Hardware Performance Monitors

Dries BuytaertAndy GeorgesLieven EeckhoutKoen De Bosschere

Control flow modeling in statistical simulation for accurate and efficient processor design studies

Lieven EeckhoutRobert H Jr BellBastiaan StougieKoen De BosschereLizy K John

Deconstructing and Improving Statistical Simulation in HLS

R BELL JR.Lieven EeckhoutL JOHNKoen De Bosschere

Efficient architectural design of high performance microprocessors

Lieven EeckhoutKoen De Bosschere

A1 Artikel in een tijdschrift in ADVANCES IN COMPUTERS, VOL. 61

Efficient simulation of trace samples on parallel machines

Lieven EeckhoutKoen De Bosschere

A1 Artikel in een tijdschrift in PARALLEL COMPUTING

Evaluation of the Gini-index for studying branch prediction features

Veerle DesmetLieven EeckhoutKoen De Bosschere

How accurate should early design stage power/performance tools be? A case study with statistical simulation

Lieven EeckhoutKoen De Bosschere

A1 Artikel in een tijdschrift in JOURNAL OF SYSTEMS AND SOFTWARE

Low-level behavioral analysis of the JVT/AVC decoder

Peter LambertLieven EeckhoutRobbie De SutterKoen De BosschereRik Van de Walle

Method-level phase behavior in Java workloads

Andy GeorgesDries BuytaertLieven EeckhoutKoen De Bosschere

A1 Artikel in een tijdschrift in ACM SIGPLAN NOTICES

Self-monitored adaptive cache warm-up for microprocessor simulation

Y LUOLK JOHNLieven Eeckhout

Speeding up architectural simulations for high-performance processors

Lieven EeckhoutKoen De Bosschere

A1 Artikel in een tijdschrift in SIMULATION-TRANSACTIONS OF THE SOCIETY FOR MODELING AND SIMULATION INTERNATIONAL

Spotting Java Performance Bottlenecks

Andy GeorgesDries BuytaertLieven EeckhoutKoen De Bosschere

2003

Accurately Warmed-up Trace Samples for the Evaluation of Cache Memories.

Lieven EeckhoutStijn EyermanBert CallensKoen De Bosschere

Comparing multiported cache schemes

S NIARLieven EeckhoutKoen De Bosschere

Designing computer architecture research workloads

Lieven EeckhoutHans VandierendonckKoen De Bosschere

A1 Artikel in een tijdschrift in COMPUTER

Efficient microprocessor design space exploration through statistical simulation

Lieven EeckhoutDirk StroobandtKoen De Bosschere

How Java programs interact with virtual machines at the microarchitectural level

Lieven EeckhoutAndy GeorgesKoen De Bosschere

A1 Artikel in een tijdschrift in ACM SIGPLAN NOTICES

Improved Static Branch Prediction for Weak Dynamic Predictions

Veerle DesmetLieven EeckhoutKoen De Bosschere

Improved Static Branch Prediction for Weak Dynamic Predictions

Veerle DesmetLieven EeckhoutKoen De Bosschere

Investigating the Interaction between Java Programs and Virtual Machines at the Microarchitectural Level

Andy GeorgesLieven EeckhoutKoen De Bosschere

Java Programs and Virtual Machines: Observations at the Microarchitectural Level

Andy GeorgesLieven EeckhoutKoen De Bosschere

Quantifying behavioral differences between multimedia and general-purpose workloads

Lieven EeckhoutKoen De Bosschere

A1 Artikel in een tijdschrift in JOURNAL OF SYSTEMS ARCHITECTURE

Quantifying the Impact of Input Data Sets on Program Behavior and its Applications

Lieven EeckhoutHans VandierendonckKoen De Bosschere

A2 Artikel in een tijdschrift in Journal of Instruction-Level Parallelism

Selecting a Reduced but Representative Workload

Lieven EeckhoutAndy GeorgesKoen De Bosschere

Statistical simulation: Adding efficiency to the computer designer's toolbox

Lieven EeckhoutS NUSSBAUMJE SMITHKoen De Bosschere

A1 Artikel in een tijdschrift in IEEE MICRO

Statistische modellering van computerprogramma\'s

Lieven Eeckhout

2002

Accurate Statistical Workload Modeling.

Lieven EeckhoutKoen De Bosschere

How Input Data Sets Change Program Behaviour.

Lieven EeckhoutHans VandierendonckKoen De Bosschere

Optimizing a 3D Image Reconstruction Algorithm: Investigating the Interaction between the High-Level Implementation, the Compiler and the Architecture.

T VANDER AALieven EeckhoutBart GoemanHans VandierendonckT VAN ACHTERENR LAUWEREINSKoen De Bosschere

Workload design: selecting representative program-input pairs

Lieven EeckhoutHans VandierendonckKoen De Bosschere

2001

Application domains for fixed-length block structured architectures

Lieven EeckhoutT Vander AaBart GoemanHans VandierendonckR LauwereinsKoen De Bosschere

Early design phase power/performance modeling through statistical simulation

Lieven EeckhoutKoen De Bosschere

Hybrid analytical-statistical modeling for efficiently exploring architecture and workload design spaces

Lieven EeckhoutKoen De Bosschere

Increasing the accuracy of statistical simulation for modeling superscalar processors

Lieven EeckhoutKoen De Bosschere

Nonuniform behavior in instruction traces for contemporary processors

Lieven EeckhoutKoen De Bosschere

Statistical Simulation of Superscalar Architectures using Commercial Workloads

Lieven EeckhoutKoen De Bosschere

2000

Early design stage exploration of fixed-length block structured architectures.

Lieven EeckhoutHenk NeefsKoen De Bosschere

A1 Artikel in een tijdschrift in JOURNAL OF SYSTEMS ARCHITECTURE

Estimating IPC of a Block Structured Instruction Set Architecture in an Early Design Stage. Parallel Computing: Fundamentals and Applications ;.

Lieven EeckhoutHenk NeefsKoen De Bosschere

On the Feasibility of Fixed-Length Block Structured Architectures.

Lieven EeckhoutKoen De BosschereHenk Neefs

Performance Analysis through Synthetic Trace Generation

Lieven EeckhoutKoen De BosschereHenk Neefs

1999

Investigating the Implementation of a Block Structured Processor Architecture in an Early Design Stage.

Lieven EeckhoutHenk NeefsKoen De BosschereJan Van Campenhout

On the Benefits of a Block Structured Instruction Set Architecture.

Lieven EeckhoutHenk NeefsKoen De Bosschere

On the Organization and Implementation of a Fixed-Length Block Structured Instruction Set Architecture.

Lieven EeckhoutHenk NeefsKoen De BosschereJan Van Campenhout

1998

Aspects of a Fixed-Length Block Structured Instruction Set to Improve Loop Performance

Lieven EeckhoutHenk NeefsKoen De BosschereJan Van Campenhout

Improving Loop Performance on a Block Structured Architecture through Predication

Lieven EeckhoutHenk NeefsKoen De BosschereJan Van Campenhout