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Researcher
Lieven Eeckhout
Profile
Projects
Publications
Activities
Awards & Distinctions
356
Results
2025
Memory-Centric MCM-GPU Architecture
Seyyed Hossein SeyyedAghaei Rezaei
Mahmood Naderan-Tahan
Magnus Jahre
Lieven Eeckhout
U
Journal Article
in
IEEE COMPUTER ARCHITECTURE LETTERS
2025
The Sustainability Gap for Computing: Quo Vadis?
Lieven Eeckhout
U
Journal Article
in
COMMUNICATIONS OF THE ACM
2025
2024
Decoupled vector runahead for prefetching nested memory-access chains
Ajeya Naithani
Jaime Roelandts
Sam Ainsworth
Timothy M. Jones
Lieven Eeckhout
A1
Journal Article
in
IEEE MICRO
2024
FOCAL : a first-order carbon model to assess processor sustainability
Lieven Eeckhout
P1
Conference
2024
GPU scale-model simulation
Seyyed Hossein SeyyedAghaei Rezaei
Mahmood Naderan-Tahan
Lieven Eeckhout
P1
Conference
2024
Per-instruction cycle stacks through time-proportional event analysis
Bjorn Gottschall
Lieven Eeckhout
Magnus Jahre
A1
Journal Article
in
IEEE MICRO
2024
RIP Geomean Speedup Use Equal-Work (Or Equal-Time) Harmonic Mean Speedup Instead
Lieven Eeckhout
U
Journal Article
in
IEEE COMPUTER ARCHITECTURE LETTERS
2024
STAR : Sub-Entry Sharing-Aware TLB for Multi-Instance GPU
Bingyao Li
Yueqi Wang
Tianyu Wang
Lieven Eeckhout
Jun Yang
Aamer Jaleel
Xulong Tang
P1
Conference
2024
Scalar Vector Runahead
Jaime Roelandts
Ajeya Naithani
Sam Ainsworth
Timothy M. Jones
Lieven Eeckhout
P1
Conference
2024
Sustainable hardware specialization
Pranav Dangi
Thilini Kaushalya Bandara
Saeideh Sheikhpour
Tulika Mitra
Lieven Eeckhout
P1
Conference
2024
Sustainable high-performance instruction selection for superscalar processors
Saeideh Sheikhpour
David Metz
Erling Jellum
Magnus Sjalander
Lieven Eeckhout
P1
Conference
2024
2023
Balancing performance against cost and sustainability in multi-chip-module GPUs
Shiqing Zhang
Mahmood Naderan-Tahan
Magnus Jahre
Lieven Eeckhout
A1
Journal Article
in
IEEE COMPUTER ARCHITECTURE LETTERS
2023
Characterizing multi-chip GPU data sharing
Shiqing Zhang
Mahmood Naderan-Tahan
Magnus Jahre
Lieven Eeckhout
A1
Journal Article
in
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION
2023
Decoupled vector runahead
Ajeya Naithani
Jaime Roelandts
Sam Ainsworth
Timothy M. Jones
Lieven Eeckhout
P1
Conference
2023
Kaya for computer architects : toward sustainable computer systems
Lieven Eeckhout
A1
Journal Article
in
IEEE MICRO
2023
Low-complexity and power-efficient processor architectures
Kartik Lakshminarasimhan
Lieven Eeckhout
Ajeya Naithani
Dissertation
2023
NUBA : non-uniform bandwidth GPUs
Xia Zhao
Magnus Jahre
Yuhua Tang
Guangda Zhang
Lieven Eeckhout
P1
Conference
2023
Photonic network-on-wafer for multichiplet GPUs
Shiqing Zhang
Ziyue Zhang
Mahmood Naderan-Tahan
Seyyed Hossein SeyyedAghaei Rezaei
Xin Wang
Lionel Hertzog
Senbiao Qin
Didier Colle
Guy Torfs
Mario Pickavet
et al.
A1
Journal Article
in
IEEE MICRO
2023
SAC : sharing-aware caching in multi-chip GPUs
Shiqing Zhang
Mahmood Naderan-Tahan
Magnus Jahre
Lieven Eeckhout
P1
Conference
2023
Scaling performance in multi-chip GPU systems : challenges and opportunities
Shiqing Zhang
Lieven Eeckhout
Mahmood Naderan-Tahan
Dissertation
2023
Sieve : stratified GPU-compute workload sampling
Mahmood Naderan-Tahan
Seyyed Hossein SeyyedAghaei Rezaei
Lieven Eeckhout
P1
Conference
2023
TEA : time-proportional event analysis
Bjorn Gottschall
Lieven Eeckhout
Magnus Jahre
P1
Conference
2023
2022
A first-order model to assess computer architecture sustainability
Lieven Eeckhout
A1
Journal Article
in
IEEE COMPUTER ARCHITECTURE LETTERS
2022
Delegated replies : alleviating network clogging in heterogeneous architectures
Xia Zhao
Lieven Eeckhout
Magnus Jahre
P1
Conference
2022
Reliability-aware management in hybrid memories : evaluation through scale-model simulation
Wenjie Liu
Lieven Eeckhout
Dissertation
2022
Reliability-aware runahead
Ajeya Naithani
Lieven Eeckhout
P1
Conference
2022
Scale-model architectural simulation
Wenjie Liu
Wim Heirman
Stijn Eyerman
Shoaib Akram
Lieven Eeckhout
P1
Conference
2022
The forward slice core : a high-performance, yet low-complexity microarchitecture
Kartik Lakshminarasimhan
Ajeya Naithani
Josue Feliu
Lieven Eeckhout
A1
Journal Article
in
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION
2022
VMT : virtualized multi-threading for accelerating graph workloads on commodity processors
Josue Feliu
Ajeya Naithani
Julio Sahuquillo
Salvador Petit
Moinuddin Qureshi
Lieven Eeckhout
A1
Journal Article
in
IEEE TRANSACTIONS ON COMPUTERS
2022
Vector runahead for indirect memory accesses
Ajeya Naithani
Sam Ainsworth
Timothy M. Jones
Lieven Eeckhout
A1
Journal Article
in
IEEE MICRO
2022
2021
Reliability-aware garbage collection for hybrid HBM-DRAM memories
Wenjie Liu
Shoaib Akram
Jennifer Sartor
Lieven Eeckhout
A1
Journal Article
in
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION
2021
Scale-model simulation
Wenjie Liu
Wim Heirman
Stijn Eyerman
Shoaib Akram
Lieven Eeckhout
A1
Journal Article
in
IEEE COMPUTER ARCHITECTURE LETTERS
2021
TIP : time-proportional instruction profiling
Björn Gottschall
Lieven Eeckhout
Magnus Jahre
P1
Conference
2021
Vector runahead
Ajeya Naithani
Sam Ainsworth
Timothy M. Jones
Lieven Eeckhout
P1
Conference
2021
cactus : top-down GPU-compute benchmarking using real-life applications
Mahmood Naderan-Tahan
Lieven Eeckhout
P1
Conference
2021
2020
A rigorous benchmarking and performance analysis methodology for Python workloads
Arthur Crapé
Lieven Eeckhout
P1
Conference
2020
COPA : highly cost-effective power back-up for green datacenters
Yan Yin
Junmin Wu
Xu Zhou
Lieven Eeckhout
Amer Qouneh
Tao Li
Zhibin Yu
A1
Journal Article
in
IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS
2020
HSM : a hybrid slowdown model for multitasking GPUs
Xia Zhao
Magnus Jahre
Lieven Eeckhout
P1
Conference
2020
MDM : the GPU memory divergence model
Lu Wang
Magnus Jahre
Almutaz Adileho
Lieven Eeckhout
P1
Conference
2020
Modeling and minimizing memory contention in general-purpose GPUs
Lu Wang
Lieven Eeckhout
Dissertation
2020
Precise runahead execution
Ajeya Naithani
Josué Feliu Pérez
Almutaz Adileh
Lieven Eeckhout
P1
Conference
2020
Selective replication in memory-side GPU caches
Xia Zhao
Magnus Jahre
Lieven Eeckhout
P1
Conference
2020
The forward slice core microarchitecture
Kartik Lakshminarasimhan
Ajeya Naithani
Josué Feliu
Lieven Eeckhout
P1
Conference
2020
Thread isolation to improve symbiotic scheduling on SMT multicore processors
Josue Feliu
Julio Sahuquillo
Salvador Petit
Lieven Eeckhout
A1
Journal Article
in
IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS
2020
2019
Adaptive memory-side last-level GPU caching
Xia Zhao
Almutaz Adileh
Zhibin Yu
Zhiying Wang
Aamer Jaleel
Lieven Eeckhout
P1
Conference
2019
CD-Xbar : a converge-diverge crossbar network for high-performance GPUs
Xia Zhao
Sheng Ma
Zhiying Wang
Natalie Enright Jerger
Lieven Eeckhout
A1
Journal Article
in
IEEE TRANSACTIONS ON COMPUTERS
2019
Crystal gazer : profile-driven write-rationing garbage collection for hybrid memories
Shoaib Akram
Jennifer Sartor
Kathryn McKinley
Lieven Eeckhout
A2
Journal Article
in
PROCEEDINGS OF THE ACM ON MEASUREMENT AND ANALYSIS OF COMPUTING SYSTEMS
2019
Directed statistical warming through time traveling
Nikos Nikoleris
Lieven Eeckhout
Erik Hagersten
Trevor E. Carlson
P1
Conference
2019
Emulating and evaluating hybrid memory for managed languages on NUMA hardware
Shoaib Akram
Jennifer Sartor
Kathryn S. McKinley
Lieven Eeckhout
P1
Conference
2019
Exploiting application diversity in throughput processors
Xia Zhao
Lieven Eeckhout
Dissertation
2019
Exploiting managed language semantics to optimize for hardware heterogeneity
Shoaib Akram
Lieven Eeckhout
J. Sartor
Dissertation
2019
HeteroCore GPU to exploit TLP-resource diversity
Xia Zhao
Zhiying Wang
Lieven Eeckhout
A1
Journal Article
in
IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS
2019
Improving soft error reliability in modern processors
Ajeya Naithani
Lieven Eeckhout
Dissertation
2019
Intra-cluster coalescing and distributed-block scheduling to reduce GPU NoC pressure
Lu Wang
Xia Zhao
David R. Kaeli
Zhiying Wang
Lieven Eeckhout
A1
Journal Article
in
IEEE TRANSACTIONS ON COMPUTERS
2019
Microarchitecture-independent analytical branch behavior and multi-threaded performance modeling
Sander De Pestel
Lieven Eeckhout
Dissertation
2019
Modeling emerging memory-divergent GPU applications
Lu Wang
Magnus Jahre
Almutaz Adileh
Zhiying Wang
Lieven Eeckhout
A1
Journal Article
in
IEEE COMPUTER ARCHITECTURE LETTERS
2019
Precise runahead execution
Ajeya Naithani
Josue Feliu
Almutaz Adileh
Lieven Eeckhout
A1
Journal Article
in
IEEE COMPUTER ARCHITECTURE LETTERS
2019
RPPM : Rapid Performance Prediction of Multithreaded workloads on multicore processors
Sander De Pestel
Sam Van den Steen
Shoaib Akram
Lieven Eeckhout
P1
Conference
2019
Racing to hardware-validated simulation
Almutaz Adileh
Cecilia González-Álvarez
Juan Miguel De Haro Ruiz
Lieven Eeckhout
P1
Conference
2019
2018
Approximate computing, intelligent computing
Lieven Eeckhout
Editorial material
2018
Architectural support for probabilistic branches
Almutaz Adileh
David J. Lilja
Lieven Eeckhout
P1
Conference
2018
Automotive computing, neuromorphic computing, and beyond
Lieven Eeckhout
Editorial material
2018
Classification-driven search for effective sm partitioning in multitasking GPUs
Xia Zhao
Zhiying Wang
Lieven Eeckhout
P1
Conference
2018
GDP : using dataflow properties to accurately estimate interference-free performance at runtime
Magnus Jahre
Lieven Eeckhout
P1
Conference
2018
Get Out of the Valley: Power-Efficient Address Mapping for GPUs
Yuxi Liu
Xia Zhao
Magnus Jahre
Zhenlin Wang
Xiaolin Wang
Yingwei Luo
Lieven Eeckhout
P1
Conference
2018
Hardware acceleration and a grateful goodbye
Lieven Eeckhout
Editorial material
2018
Hot Chips 29
Lieven Eeckhout
Editorial material
2018
Intra-cluster coalescing to reduce GPU NoC pressure
Lu Wang
Xia Zhao
David Kaeli
Zhiying Wang
Lieven Eeckhout
P1
Conference
2018
MIA : metric importance analysis for big data workload characterization
Zhibin Yu
Wen Xiong
Lieven Eeckhout
Zhendong Bei
Avi Mendelson
Chengzhong Xu
A1
Journal Article
in
IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS
2018
Managing hybrid memories by predicting object write intensity
Shoaib Akram
Kathryn S. McKinley
Jennifer B. Sartor
Lieven Eeckhout
C1
Conference
2018
Maximizing heterogeneous processor performance under power constraints
Almutaz Adileh
Lieven Eeckhout
Dissertation
2018
Memristors and more
Lieven Eeckhout
Editorial material
2018
Microarchitecture-independent analytical processor performance and power modeling
Sam Van den Steen
Lieven Eeckhout
Dissertation
2018
Modeling superscalar processor memory-level parallelism
Sam Van den Steen
Lieven Eeckhout
A1
Journal Article
in
IEEE COMPUTER ARCHITECTURE LETTERS
2018
Moore's law and ultra-low-power processors
Lieven Eeckhout
Editorial material
2018
Optimizing soft error reliability through scheduling on heterogeneous multicore processors
Ajeya Naithani
Stijn Eyerman
Lieven Eeckhout
A1
Journal Article
in
IEEE TRANSACTIONS ON COMPUTERS
2018
QIG : quantifying the importance and interaction of GPGPU architecture parameters
Zhibin Yu
Jing Wang
Lieven Eeckhout
Chengzhong Xu
A1
Journal Article
in
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS
2018
RPPM : rapid performance prediction of multithreaded applications on multicore hardware
Sander De Pestel
Sam Van den Steen
Shoaib Akram
Lieven Eeckhout
A1
Journal Article
in
IEEE COMPUTER ARCHITECTURE LETTERS
2018
Top picks
Lieven Eeckhout
Editorial material
2018
2017
Analyzing the scalability of managed language applications with speedup stacks
Jennifer B. Sartor
Kristof Du Bois
Stijn Eyerman
Lieven Eeckhout
P1
Conference
2017
Application clustering policies to address system fairness with Intel’s cache allocation technology
Vicent Selfa Oliver
Julio Sahuquillo
Lieven Eeckhout
Salvador Petit
Maria E. Gomez
C1
Conference
2017
BACM : barrier-aware cache management for irregular memory-intensive GPGPU workloads
Yuxi Liu
Xia Zhao
Zhibin Yu
Zhenlin Wang
Xiaolin Wang
Yingwei Luo
Lieven Eeckhout
C1
Conference
2017
DEP+BURST : online DVFS performance prediction for energy-efficient managed language execution
Shoaib Akram
Jennifer Sartor
Lieven Eeckhout
A1
Journal Article
in
IEEE TRANSACTIONS ON COMPUTERS
2017
Improving IBM POWER8 performance through symbiotic job scheduling
Josue Feliu
Stijn Eyerman
Julio Sahuquillo
Salvador Petit
Lieven Eeckhout
A1
Journal Article
in
IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS
2017
LA-LLC : inter-core locality-aware last-level cache to exploit many-to-many traffic in GPGPUs
Xia Zhao
Yuxi Liu
Almutaz Adileh
Lieven Eeckhout
A1
Journal Article
in
IEEE COMPUTER ARCHITECTURE LETTERS
2017
Linear branch entropy : characterizing and optimizing branch behavior in a micro-architecture independent way
Sander De Pestel
Stijn Eyerman
Lieven Eeckhout
A1
Journal Article
in
IEEE TRANSACTIONS ON COMPUTERS
2017
Mind the power holes : sifting operating points in power-limited heterogeneous multicores
Almutaz Adileh
Stijn Eyerman
Aamer Jaleel
Lieven Eeckhout
A1
Journal Article
in
IEEE COMPUTER ARCHITECTURE LETTERS
2017
Shared resource aware scheduling on power-constrained tiled many-core processors
Sudhanshu Shekhar Jha
Wim Heirman
Ayose Falcon
Jordi Tubella
Antonio Gonzalez
Lieven Eeckhout
A1
Journal Article
in
JOURNAL OF PARALLEL AND DISTRIBUTED COMPUTING
2017
2016
A heterogeneous low-cost and low-latency Ring-Chain network for GPGPUs
Xia Zhao
Sheng Ma
Chen Li
Lieven Eeckhout
Zhiying Wang
P1
Conference
2016
A low-cost conflict-free NoC for GPGPUs
Xia Zhao
Sheng Ma
Yuxi Liu
Lieven Eeckhout
Zhiying Wang
P1
Conference
2016
Analytical processor performance and power modeling using micro-architecture independent characteristics
Sam Van den Steen
Stijn Eyerman
Sander De Pestel
Moncef Mechri
Trevor Carlson
David Black-Schaffer
Erik Hagersten
Lieven Eeckhout
A1
Journal Article
in
IEEE TRANSACTIONS ON COMPUTERS
2016
Barrier-aware warp scheduling for throughput processors
Yuxi Liu
Zhibin Yu
Lieven Eeckhout
Vijay Janapa Reddi
Yingwei Luo
Xiaolin Wang
Zhenlin Wang
Chengzhong Xu
C1
Conference
2016
Boosting the priority of garbage: scheduling collection on heterogeneous multicore processors
Shoaib Akram
Jennifer Sartor
Kenzo Van Craeynest
Wim Heirman
Lieven Eeckhout
A1
Journal Article
in
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION
2016
DVFS performance prediction for managed multithreaded applications
Shoaib Akram
Jennifer Sartor
Lieven Eeckhout
P1
Conference
2016
MInGLE: an efficient framework for domain acceleration using low-power specialized functional units
Cecilia González-Álvarez
Jennifer Sartor
Carlos Àlvarez
Daniel Jimènez-Gonzàlez
Lieven Eeckhout
A1
Journal Article
in
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION
2016
Maximizing heterogeneous processor performance under power constraints
Almutaz Adileh
Stijn Eyerman
Aamer Jaleel
Lieven Eeckhout
A1
Journal Article
in
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION
2016
RFHOC: a random-forest approach to auto-tuning Hadoop's configuration
Zhendong Bei
Zhibin Yu
Huiling Zhang
Wen Xiong
Chengzhong Xu
Lieven Eeckhout
Shengzhong Feng
A1
Journal Article
in
IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS
2016
Shared resource aware scheduling on power-constrained tiled many-core processors
Sudhanshu Jha
Wim Heirman
Ayose Falcon
Jordi Tubella
Antonio Gonzalez
Lieven Eeckhout
C1
Conference
2016
ShenZhen transportation system (SZTS): a novel big data benchmark suite
Wen Xiong
Zhibin Yu
Lieven Eeckhout
Zhengdong Bei
Fan Zhang
Chengzhong Xu
A1
Journal Article
in
JOURNAL OF SUPERCOMPUTING
2016
The truth, the whole truth, and nothing but the truth : a pragmatic guide to assessing empirical evaluations
Stephen M Blackburn
Amer Diwan
Matthias Hauswirth
Peter F Sweeney
Jose Nelson Amaral
Tim Brecht
Lubomir Bulej
Cliff Click
Lieven Eeckhout
Sebastian Fischmeister
et al.
A1
Journal Article
in
ACM TRANSACTIONS ON PROGRAMMING LANGUAGES AND SYSTEMS
2016
Thread similarity matrix: visualizing branch divergence in GPGPU programs
Zhibin Yu
Lieven Eeckhout
Chengzhong Xu
P1
Conference
2016
Two-level hybrid sampled simulation of multithreaded applications
Chuntao Jiang
Zhibin Yu
Lieven Eeckhout
Hai Jin
Xiaofei Liao
Cheng-Zhong Xu
A1
Journal Article
in
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION
2016
2015
Automated design of domain-specific custom instructions
Cecilia González-Álvarez
Lieven Eeckhout
Daniel Jiménez-González
Carlos Álvarez Martinez
Dissertation
2015
Automatic design of domain-specific instructions for low-power processors
Cecilia González-Álvarez
Jennifer Sartor
Carlos Alvarez
Daniel Jimenez-Gonzalez
Lieven Eeckhout
P1
Conference
2015
Building on 35 years toward a vibrant future
Lieven Eeckhout
Editorial material
2015
Chrysso: an integrated power manager for constrained many-core processors
Sudhanshu Jha
Wim Heirman
Ayose Falcon
Trevor Carlson
Kenzo Van Craeynest
Jordi Tubella
Antonio Gonzalez
Lieven Eeckhout
C1
Conference
2015
GPGPU-MiniBench: accelerating GPGPU micro-architecture simulation
Zhibin Yu
Lieven Eeckhout
Nilanjan Goswami
Tao Li
Lizy K John
Hai Jin
Cheng-Zhong Xu
Junmin Wu
A1
Journal Article
in
IEEE TRANSACTIONS ON COMPUTERS
2015
Heterogeneity in response to the power wall
Lieven Eeckhout
Editorial material
2015
Hot chips in an increasingly diverse microprocessor landscape
Lieven Eeckhout
Editorial material
2015
Mechanistic analytical modeling of superscalar in-order processor performance
Maximilien Breughe
Stijn Eyerman
Lieven Eeckhout
A1
Journal Article
in
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION
2015
Mechanistic modeling of architectural vulnerability factor
Arun Nair
Stijn Eyerman
Jian Chen
Lizy John
Lieven Eeckhout
A1
Journal Article
in
ACM TRANSACTIONS ON COMPUTER SYSTEMS
2015
Micro-architecture independent analytical processor performance and power modeling
Sam Van den Steen
Sander De Pestel
Moncef Mechri
Stijn Eyerman
Trevor Carlson
David Black-Schaffer
Erik Hagersten
Lieven Eeckhout
P1
Conference
2015
Micro-architecture independent branch behavior modeling
Sander De Pestel
Stijn Eyerman
Lieven Eeckhout
P1
Conference
2015
Performance evaluation and its impact on design
Lieven Eeckhout
Editorial material
2015
Practical iterative optimization for the data center
Shuangde Fang
Wenwen Xu
Yang Chen
Lieven Eeckhout
Olivier Temam
Yunji Chen
Chengyong Wu
Xiaobing Feng
A1
Journal Article
in
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION
2015
Proceedings of the 21st IEEE International Symposium on High Performance Computer Architecture (HPCA)
Book editor
2015
SZTS: a novel big data transportation system Benchmark suite
Wen Xiong
Zhibin Yu
Lieven Eeckhout
Zhengdong Bei
Fan Zhang
Cheng-Zhong Xu
P1
Conference
2015
Shorter on-line warmup for sampled simulation of multi-threaded applications
Chuntao Jiang
Zhibin Yu
Hai Jin
Xiaofei Liao
Lieven Eeckhout
Yonggang Zeng
Cheng-Zhong Xu
P1
Conference
2015
The load slice core microarchitecture
Trevor Carlson
Wim Heirman
Osman Allam
Stefanos Kaxiras
Lieven Eeckhout
P1
Conference
2015
The state of the computer architecture field and its top picks
Lieven Eeckhout
Editorial material
2015
The structure of computer architecture (r)evolution
Lieven Eeckhout
Editorial material
2015
2014
An evaluation of high-level mechanistic core models
Trevor Carlson
Wim Heirman
Stijn Eyerman
Ibrahim Hur
Lieven Eeckhout
A1
Journal Article
in
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION
2014
Automatic SMT threading for OpenMP applications on the Intel Xeon Phi co-processor
Wim Heirman
Trevor E Carlson
Kenzo Van Craeynest
Ibrahim Hur
Aamer Jaleel
Lieven Eeckhout
P1
Conference
2014
BarrierPoint: sampled simulation of multi-threaded applications
Trevor Carlson
Wim Heirman
Kenzo Van Craeynest
Lieven Eeckhout
P1
Conference
2014
Cooperative cache scrubbing
Jennifer Sartor
Wim Heirman
Stephen M. Blackburn
Lieven Eeckhout
Kathryn S McKinley
C1
Conference
2014
Efficient design space exploration of embedded microprocessors
Maximilien Breughe
Lieven Eeckhout
Stijn Eyerman
Dissertation
2014
Efficient, accurate and reproducible simulation of multi-threaded workloads
Trevor Carlson
Wim Heirman
Harish Patil
Lieven Eeckhout
C3
Conference
2014
Node performance and energy analysis with the sniper multi-core simulator
Trevor Carlson
Wim Heirman
Kenzo Van Craeynest
Lieven Eeckhout
Bookchapter
in
Tools for high performance computing 2013
2014
Performance analysis methods for understanding scaling bottlenecks in multi-threaded applications
Kristof Du Bois
Lieven Eeckhout
Stijn Eyerman
Dissertation
2014
Performance portability across heterogeneous SoCs using a generalized library-based approach
Shuangde Fang
Zidong Du
Yuntan Fang
Yuanjie Huang
Yang Chen
Lieven Eeckhout
Olivier Temam
Huawei Li
Yunji Chen
Chengyong Wu
A1
Journal Article
in
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION
2014
Speeding up architectural simulation through high-level core abstractions and sampling
Trevor Carlson
Lieven Eeckhout
Dissertation
2014
The benefit of SMT in the multi-core era: flexibility towards degrees of thread-level parallelism
Stijn Eyerman
Lieven Eeckhout
A1
Journal Article
in
Proceedings of the 19th international conference on Architectural support for programming languages and operating systems
2014
Undersubscribed threading on clustered cache architectures
Wim Heirman
Trevor Carlson
Kenzo Van Craeynest
Ibrahim Hur
Aamer Jaleel
Lieven Eeckhout
P1
Conference
2014
2013
Accelerating GPGPU architecture simulation
Zhibin Yu
Lieven Eeckhout
Nilanjan Goswani
Tao Li
Lizy Kurian John
Hai Jin
Cheng-Zhong Xu
C3
Conference
2013
Accelerating an application domain with specialized functional units
Cecilia González-Álvarez
Jennifer Sartor
Carlos Alvarez
Daniel Jimenez-Gonzalez
Lieven Eeckhout
A1
Journal Article
in
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION
2013
Bottle graphs: visualizing scalability bottlenecks in multi-threaded applications
Kristof Du Bois
Jennifer Sartor
Stijn Eyerman
Lieven Eeckhout
A1
Journal Article
in
ACM SIGPLAN NOTICES
2013
Criticality stacks: identifying critical threads in parallel programs using synchronization behavior
Kristof Du Bois
Stijn Eyerman
Jennifer Sartor
Lieven Eeckhout
C1
Conference
2013
Fairness-aware scheduling on single-ISA heterogeneous multi-cores
Kenzo Van Craeynest
Shoaib Akram
Wim Heirman
Aamer Jaleel
Lieven Eeckhout
P1
Conference
2013
Modeling and scheduling heterogeneous multi-core architectures
Kenzo Van Craeynest
Lieven Eeckhout
Dissertation
2013
Node performance and energy analysis with the sniper multi-core simulator
Trevor Carlson
Wim Heirman
Kenzo Van Craeynest
Lieven Eeckhout
C1
Conference
2013
PCantorSim: accelerating parallel architecture simulation through fractal-based sampling
Chuntao Jiang
Zhibin Yu
Hai Jin
Chengzhong Xu
Lieven Eeckhout
Wim Heirman
Trevor Carlson
Xiaofei Liao
A1
Journal Article
in
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION
2013
Per-thread cycle accounting in multicore processors
Kristof Du Bois
Stijn Eyerman
Lieven Eeckhout
A1
Journal Article
in
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION
2013
Proceedings of the Eleventh IEEE/ACM International Symposium on Code Generation and Optimization (CGO 2013)
Book editor
2013
Restating the case for weighted-IPC metrics to evaluate multiprogram workload performance
Stijn Eyerman
Lieven Eeckhout
A1
Journal Article
in
IEEE COMPUTER ARCHITECTURE LETTERS
2013
Sampled simulation of multi-threaded applications
Trevor Carlson
Wim Heirman
Lieven Eeckhout
C1
Conference
2013
Selecting representative benchmark inputs for exploring microprocessor design spaces
Maximilien Breughe
Lieven Eeckhout
A1
Journal Article
in
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION
2013
Simulating and analyzing commercial workloads and computer systems
Frederick Ryckbosch
Lieven Eeckhout
Dissertation
2013
Understanding fundamental design choices in single-ISA heterogeneous multicore architectures
Kenzo Van Craeynest
Lieven Eeckhout
A1
Journal Article
in
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION
2013
Workload characterization and synthesis for data center optimization
Stijn Polfliet
Lieven Eeckhout
Dissertation
2013
2012
A first-order mechanistic model for architectural vulnerability factor
Arun Arvind Nair
Stijn Eyerman
Lieven Eeckhout
Lizy Kurian John
P1
Conference
2012
A mechanistic performance model for superscalar in-order processors
Maximilien Breughe
Stijn Eyerman
Lieven Eeckhout
C1
Conference
2012
An efficient CPI stack counter architecture for superscalar processors
Osman Allam
Stijn Eyerman
Lieven Eeckhout
C1
Conference
2012
Deconstructing iterative optimization
Yang Chen
Shuangde Fang
Yuanjie Huang
Lieven Eeckhout
Grigori Fursin
Olivier Temam
Chengyong Wu
A1
Journal Article
in
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION
2012
Exploiting media stream similarity for energy-efficient decoding and resource prediction
Juan Hamers
Lieven Eeckhout
A1
Journal Article
in
ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS
2012
Exploring multi-threaded Java application performance on multicore hardware
Jennifer Sartor
Lieven Eeckhout
A1
Journal Article
in
ACM SIGPLAN NOTICES
2012
Iterative optimization for the data center
Yang Chen
Shuangde Fang
Lieven Eeckhout
Olivier Temam
Chengyong Wu
A1
Journal Article
in
ACM SIGPLAN NOTICES
2012
Power aware early design stage hardware software co-optimization
Souradip Sarkar
Wim Heirman
Trevor Carlson
Lieven Eeckhout
C1
Conference
2012
Power-aware multi-core simulation for early design stage hardware/software co-optimization
Wim Heirman
Souradip Sarkar
Trevor Carlson
Ibrahim Hur
Lieven Eeckhout
C1
Conference
2012
Probabilistic modeling for job symbiosis scheduling on SMT processors
Stijn Eyerman
Lieven Eeckhout
A1
Journal Article
in
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION
2012
SWAP: parallelization through algorithm substitution
Hengjie Li
Wenting He
Yang Chen
Lieven Eeckhout
Olivier Temam
Chengyong Wu
A1
Journal Article
in
IEEE MICRO
2012
Scheduling heterogeneous multi-cores through performance impact estimation (PIE)
Kenzo Van Craeynest
Aamer Jaleel
Lieven Eeckhout
Paolo Narvaez
Joel S Emer
P1
Conference
2012
Sniper: scalable and accurate parallel multi-core simulation
Wim Heirman
Trevor Carlson
Lieven Eeckhout
C1
Conference
2012
Speedup stacks: identifying scaling Bottlenecks in multi-threaded applications
Stijn Eyerman
Kristof Du Bois
Lieven Eeckhout
C1
Conference
2012
Studying hardware and software trade-offs for a real-life web 2.0 workload
Stijn Polfliet
Frederick Ryckbosch
Lieven Eeckhout
C1
Conference
2012
VSim: simulating multi-server setups at near native hardware speed
Frederick Ryckbosch
Stijn Polfliet
Lieven Eeckhout
A1
Journal Article
in
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION
2012
Workload generation for microprocessor performance evaluation
Luk Van Ertvelde
Lieven Eeckhout
C3
Conference
2012
2011
Automated full-system power characterization
Stijn Polfliet
Frederick Ryckbosch
Lieven Eeckhout
A1
Journal Article
in
IEEE MICRO
2011
Evaluating application vulnerability to soft errors in multi-level cache hierarchy
Zhe Ma
Trevor Carlson
Wim Heirman
Lieven Eeckhout
C1
Conference
2011
Fine-grained DVFS using on-chip regulators
Stijn Eyerman
Lieven Eeckhout
A1
Journal Article
in
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION
2011
How sensitive is processor customization to the workload's input datasets?
Maximilien Breughe
Li Zheng
Yang Chen
Stijn Eyerman
Olivier Temam
Chengyong Wu
Lieven Eeckhout
C1
Conference
2011
Mechanistic-empirical processor performance modeling for constructing CPI stacks on real hardware
Stijn Eyerman
Kenneth Hoste
Lieven Eeckhout
C1
Conference
2011
Optimizing the datacenter for data-centric workloads
Stijn Polfliet
Frederick Ryckbosch
Lieven Eeckhout
C1
Conference
2011
Ranking commercial machines through data transposition
Beau Piccart
Andy Georges
Hendrik Blockeel
Lieven Eeckhout
P1
Conference
2011
SWEEP: evaluating computer system energy efficiency using synthetic workloads
Kristof Du Bois
Tim Schaeps
Stijn Polfliet
Frederick Ryckbosch
Lieven Eeckhout
C1
Conference
2011
Sniper: exploring the level of abstraction for scalable and accurate parallel multi-core simulation
Trevor Carlson
Wim Heirman
Lieven Eeckhout
C1
Conference
2011
The multi-program performance model: debunking current practice in multi-core simulation
Kenzo Van Craeynest
Lieven Eeckhout
P1
Conference
2011
Trends in server energy proportionality
Frederick Ryckbosch
Stijn Polfliet
Lieven Eeckhout
A1
Journal Article
in
COMPUTER
2011
Using cycle stacks to understand scaling bottlenecks in multi-threaded workloads
Wim Heirman
Trevor Carlson
Shuai Che
Kevin Skadron
Lieven Eeckhout
P1
Conference
2011
Using fast and accurate simulation to explore hardware/software trade-offs in the multi-core era
Wim Heirman
Trevor Carlson
Souradip Sarkar
Pieter Ghysels
Wim Vanroose
Lieven Eeckhout
C1
Conference
2011
Virtual Manycore platforms : moving towards 100+ processor cores
Rainer Leupers
Lieven Eeckhout
Grant Martin
Frank Schirrmeister
Nigel Topham
Xiaotao Chent
C1
Conference
2011
2010
2010 IEEE International symposium on Performance Analysis of Systems and Software
Book editor
2010
A counter architecture for online DVFS profitability estimation
Stijn Eyerman
Lieven Eeckhout
A1
Journal Article
in
IEEE TRANSACTIONS ON COMPUTERS
2010
AVF stressmark: towards an automated methodology for bounding the worst-case vulnerability to soft errors
Arun Arvind Nair
Lizy Kurian John
Lieven Eeckhout
C1
Conference
2010
Automated just-in-time compiler tuning
Kenneth Hoste
Andy Georges
Lieven Eeckhout
P1
Conference
2010
Benchmark synthesis for architecture and compiler exploration
Luk Van Ertvelde
Lieven Eeckhout
C1
Conference
2010
Computer architecture performance evaluation methods
Lieven Eeckhout
Book
2010
Evaluating iterative optimization across 1000 data sets
Yang Chen
Yuanjie Huang
Lieven Eeckhout
Grigori Fursin
Liang Peng
Olivier Temam
Chengyong Wu
A1
Journal Article
in
ACM SIGPLAN NOTICES
2010
Fast simulation techniques for microprocessor design space exploration
Davy Genbrugge
Lieven Eeckhout
Dissertation
2010
Fast, accurate and validated full-system software simulation of x86 hardware
Frederick Ryckbosch
Stijn Polfliet
Lieven Eeckhout
A1
Journal Article
in
IEEE MICRO
2010
Interval simulation: raising the level of abstraction in architectural simulation
Davy Genbrugge
Stijn Eyerman
Lieven Eeckhout
P1
Conference
2010
Modeling critical sections in Amdahl's law and its implications for multicore design
Stijn Eyerman
Lieven Eeckhout
P1
Conference
2010
Per-thread cycle accounting
Stijn Eyerman
Lieven Eeckhout
A1
Journal Article
in
IEEE MICRO
2010
Performance metrics for consolidated servers
Andy Georges
Lieven Eeckhout
C1
Conference
2010
Probabilistic job symbiosis modeling for SMT processor scheduling
Stijn Eyerman
Lieven Eeckhout
A1
Journal Article
in
ACM SIGPLAN NOTICES
2010
Scenario-based resource prediction for QoS-aware media processing
Juan Hamers
Lieven Eeckhout
A1
Journal Article
in
COMPUTER
2010
Statistical simulation
Lieven Eeckhout
Davy Genbrugge
Bookchapter
in
Processor and System-on-Chip Simulation
2010
Workload reduction and generation techniques
Luk Van Ertvelde
Lieven Eeckhout
A1
Journal Article
in
IEEE MICRO
2010
2009
A mechanistic performance model for superscalar out-of-order processors
Stijn Eyerman
Lieven Eeckhout
Tejas Karkhanis
James E Smith
A1
Journal Article
in
ACM TRANSACTIONS ON COMPUTER SYSTEMS
2009
A methodology for analyzing commercial processor performance numbers
Kenneth Hoste
Lieven Eeckhout
A1
Journal Article
in
COMPUTER
2009
Chip multiprocessor design space exploration through statistical simulation
Davy Genbrugge
Lieven Eeckhout
A1
Journal Article
in
IEEE TRANSACTIONS ON COMPUTERS
2009
Finding extreme behaviors in microprocessor workloads
Frederik Vandeputte
Lieven Eeckhout
A2
Journal Article
in
TRANSACTIONS ON HIGH-PERFORMANCE EMBEDDED ARCHITECTURES AND COMPILERS
2009
Finding stress patterns in microprocessor workloads
Frederik Vandeputte
Lieven Eeckhout
P1
Conference
2009
ISPASS 2009: IEEE International symposium on Performance Analysis of Systems and Software
Book editor
2009
MLP-Aware runahead threads in a simultaneous multithreading processor
Kenzo Van Craeynest
Stijn Eyerman
Lieven Eeckhout
P1
Conference
2009
Memory-level parallelism aware fetch policies for simultaneous multithreading processors
Stijn Eyerman
Lieven Eeckhout
A1
Journal Article
in
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION
2009
Per-thread cycle accounting in SMT processors
Stijn Eyerman
Lieven Eeckhout
A1
Journal Article
in
ACM SIGPLAN NOTICES
2009
Raising the level of abstraction in architectural simulation
Davy Genbrugge
Stijn Eyerman
Lieven Eeckhout
C1
Conference
2009
Raising the level of abstraction in architectural simulation
Davy Genbrugge
Stijn Eyerman
Lieven Eeckhout
C1
Conference
2009
System-scenario-based design of dynamic embedded systems
Stefan Valentin Gheorghita
Martin Palkovic
Juan Hamers
Arnout Vandecappelle
Mamagkakis Stelios
Twan Basten
Lieven Eeckhout
Henk Corporaal
Francky Catthoor
Frederik Vandeputte
et al.
A1
Journal Article
in
ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS
2009
2008
Accurate and efficient cache warmup for sampled processor simulation through NSL-BLRL
Luk Van Ertvelde
Filip Hellebaut
Lieven Eeckhout
A1
Journal Article
in
COMPUTER JOURNAL
2008
Automated Hardware-Independent Scenario Identification
Juan Hamers
Lieven Eeckhout
P1
Conference
2008
Automated microprocessor stressmark generation
Ajay Joshi
Lieven Eeckhout
Lizy K John
Ciji Isen
P1
Conference
2008
COLE: Compiler Optimization Level Exploration
Kenneth Hoste
Lieven Eeckhout
P1
Conference
2008
Characterizing the Unique and Diverse Behaviors in Existing and Emerging General-Purpose and Domain-Specific Benchmark Suites
Kenneth Hoste
Lieven Eeckhout
P1
Conference
2008
Dispersing proprietary applications as benchmarks through code mutation
Luk Van Ertvelde
Lieven Eeckhout
A1
Journal Article
in
ACM SIGPLAN NOTICES
2008
Distilling the essence of proprietary workloads into miniature benchmarks
Ajay Joshi
Lieven Eeckhout
Robert Bell
Lizy John
A1
Journal Article
in
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION
2008
Java Performance Evaluation through Rigorous Replay Compilation
Andy Georges
Lieven Eeckhout
Dries Buytaert
A1
Journal Article
in
ACM SIGPLAN NOTICES
2008
Memory data flow Modeling in statistical simulation for the efficient exploration of microprocessor design spaces
Davy Genbrugge
Lieven Eeckhout
A1
Journal Article
in
IEEE TRANSACTIONS ON COMPUTERS
2008
Phase Complexity Surfaces: Characterizing Time-Varying Program Behavior
Frederik Vandeputte
Lieven Eeckhout
P1
Conference
2008
Profileringstechnieken voor prestatieanalyse en optimalisatie van Javaprogramma's
Dries Buytaert
Koen De Bosschere
Lieven Eeckhout
Dissertation
2008
Sampled processor simulation: a survey
Lieven Eeckhout
A1
Journal Article
in
ADVANCES IN COMPUTERS
2008
Statistical Simulation of DRAM
Davy Genbrugge
Lieven Eeckhout
C1
Conference
2008
Studying Compiler Optimizations on Superscalar Processors through Interval Analysis
Stijn Eyerman
Lieven Eeckhout
James E. Smith
P1
Conference
2008
System-level performance metrics for multiprogram workloads
Stijn Eyerman
Lieven Eeckhout
A1
Journal Article
in
IEEE MICRO
2008
The Return of Synthetic Benchmarks
Ajay Joshi
Lieven Eeckhout
Lizy John
C1
Conference
2008
Three pitfalls in Java performance evaluation
Andy Georges
Koen De Bosschere
Lieven Eeckhout
Dissertation
2008
2007
A memory-level parallelism aware fetch policy for SMT processors
Stijn Eyerman
Lieven Eeckhout
P1
Conference
2007
A top-down approach to architecting CPI component performance counters
Stijn Eyerman
Lieven Eeckhout
T KARKHANIS
JE SMITH
A1
Journal Article
in
IEEE MICRO
2007
Adding Rigorous Statistics to the Java Benchmarker's Toolbox
Andy Georges
D BUYTAERT
Lieven Eeckhout
C1
Conference
2007
Analyzing Commercial Processor Performance Numbers for Predicting Performance of Applications of Interest
Kenneth Hoste
Lieven Eeckhout
H BLOCKEEL
C1
Conference
2007
Branch Predictor Warmup for Sampled Simulation through Branch History Matching
S KLUYSKENS
Lieven Eeckhout
C1
Conference
2007
Branch history matching: Branch predictor warmup for sampled simulation
Simon Kluyskens
Lieven Eeckhout
P1
Conference
2007
Characterization and reduction of memory usage in 64-bit Java Virtual Machines
Kris Venstermans
Koen De Bosschere
Lieven Eeckhout
Dissertation
2007
Exploiting program phase behavior for energy reduction on multi-configuration processors
Frederik Vandeputte
Lieven Eeckhout
Koen De Bosschere
A1
Journal Article
in
JOURNAL OF SYSTEMS ARCHITECTURE
2007
Exploiting video stream similarity for energy-efficient decoding
Juan Hamers
Lieven Eeckhout
Koen De Bosschere
P1
Conference
2007
Exploring the Application Behavior Space Using Parameterized Synthetic Benchmarks
A JOSHI
Lieven Eeckhout
L JOHN
C1
Conference
2007
GCH: hints for triggering garbage collections
Dries Buytaert
Kris Venstermans
Lieven Eeckhout
Koen De Bosschere
P1
Conference
2007
Java object header elimination for reduced memory consumption in 64-bit virtual machines
Kris Venstermans
Lieven Eeckhout
Koen De Bosschere
A1
Journal Article
in
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION
2007
Microarchitecture-independent workload characterization
Kenneth Hoste
Lieven Eeckhout
A1
Journal Article
in
IEEE Micro
2007
Object-relative addressing: Compressed pointers in 64-bit Java virtual machines
Kris Venstermans
Lieven Eeckhout
Koen De Bosschere
P1
Conference
2007
Proceedings of the 10th Workshop on Computer Architecture Evaluation using Commercial Workloads (CAECW) held in conjunction with the 13th International Symposium on High-Performance Computer Architecture (HPCA)
R IYER
Lieven Eeckhout
C1
Conference
2007
Representative Multiprogram Workloads for Multithreaded Processor Simulation
M VAN BIESBROUCK
Lieven Eeckhout
B CALDER
C1
Conference
2007
Resource prediction for media stream decoding
Juan Hamers
Lieven Eeckhout
P1
Conference
2007
Statistical Simulation of Chip Multiprocessors Running Multi-Program Workloads
Davy Genbrugge
Lieven Eeckhout
P1
Conference
2007
Statistical simulation for exploring the chip multiprocessor cache design space
Davy Genbrugge
Lieven Eeckhout
C1
Conference
2007
Statistical simulation for exploring the chip multiprocessor cache design space
Davy Genbrugge
Lieven Eeckhout
C1
Conference
2007
Statistically Rigorous Java Performance Evaluation
Andy Georges
Dries Buytaert
Lieven Eeckhout
A1
Journal Article
in
ACM SIGPLAN NOTICES
2007
Studying Compiler-Microarchitecture Interactions through Interval Analysis
Stijn Eyerman
Lieven Eeckhout
J SMITH
C1
Conference
2007
Towards an Automatic Benchmark Generation Method
Luk Van Ertvelde
Lieven Eeckhout
C1
Conference
2007
Using HPM-sampling to drive dynamic compilation
Dries Buytaert
Andy Georges
Michael Hind
Matthew Arnold
Lieven Eeckhout
Koen De Bosschere
A1
Journal Article
in
ACM SIGPLAN NOTICES
2007
2006
64-bit versus 32-bit virtual machines for Java
Kris Venstermans
Lieven Eeckhout
Koen De Bosschere
A1
Journal Article
in
SOFTWARE-PRACTICE & EXPERIENCE
2006
A performance counter architecture for computing accurate CPI components
Stijn Eyerman
Lieven Eeckhout
Tejas Karkhanis
James E Smith
A1
Journal Article
in
ACM SIGPLAN NOTICES
2006
A performance counter architecture for computing accurate CPI components
Stijn Eyerman
Lieven Eeckhout
Tejas Karkhanis
James E Smith
C1
Conference
2006
Accurate Memory Data Flow Modeling in Statistical Simulation
Davy Genbrugge
Lieven Eeckhout
Koen De Bosschere
C1
Conference
2006
An analysis of program phase behavior and its predictability
Frederik Vandeputte
Lieven Eeckhout
Koen De Bosschere
P1
Conference
2006
Analyzing the Processor Bottlenecks in SPEC CPU2000
J YI
A JOSHI
R SENDAG
Lieven Eeckhout
D LILJA
C1
Conference
2006
Automatic Generation of Synthetic Benchmarks
Luk Van Ertvelde
Lieven Eeckhout
Koen De Bosschere
C1
Conference
2006
Benchmark Selection
Lieven Eeckhout
Bookchapter
in
Performance Evaluation and Benchmarking
2006
Building Java Program Analysis Tools using Javana
Dries Buytaert
Jonas Maebe
Lieven Eeckhout
Koen De Bosschere
C1
Conference
2006
Characterizing the branch misprediction penalty
Stijn Eyerman
James E Smith
Lieven Eeckhout
P1
Conference
2006
Comparing benchmarks using key microarchitecture-independent characteristics
Kenneth Hoste
Lieven Eeckhout
P1
Conference
2006
Considering all starting points for simultaneous multithreading simulation
M VAN BIESBROUCK
Lieven Eeckhout
B CALDER
P1
Conference
2006
Efficient design space exploration of high performance embedded out-of-order processors
Stijn Eyerman
Lieven Eeckhout
Koen De Bosschere
P1
Conference
2006
Efficient sampling startup for SimPoint
M VAN BIESBROUCK
B CALDER
Lieven Eeckhout
A1
Journal Article
in
IEEE MICRO
2006
Evaluating benchmark subsetting approaches
JJ YI
R SENDAG
Lieven Eeckhout
A JOSHI
DJ LILJA
LK JOHNS
P1
Conference
2006
Evaluating the efficacy of statistical simulation for design space exploration
A JOSHI
JJ YI
RH BELL
Lieven Eeckhout
L JOHN
D LIJA
P1
Conference
2006
Identifying Program Phase Behavior in Parallel Programs on Distributed Shared-memory Systems
Frederik Vandeputte
Lieven Eeckhout
Koen De Bosschere
Wim Heirman
C1
Conference
2006
Identifying Program Phase Transition Points
Frederik Vandeputte
Lieven Eeckhout
Koen De Bosschere
[0-9]{2}
2006
Identifying the Best Performing Hardware Platform Based on Inherent Program Similarity
Kenneth Hoste
Lieven Eeckhout
Andy Georges
Koen De Bosschere
C1
Conference
2006
Improved composite confidence mechanisms for a perceptron branch predictor
Veerle Desmet
Lieven Eeckhout
Koen De Bosschere
A1
Journal Article
in
JOURNAL OF SYSTEMS ARCHITECTURE
2006
Javana: a system for building customized Java program analysis tools
Jonas Maebe
Dries Buytaert
Lieven Eeckhout
Koen De Bosschere
C1
Conference
2006
Javana: a system for building customized Java program analysis tools
Jonas Maebe
Dries Buytaert
Lieven Eeckhout
Koen De Bosschere
A1
Journal Article
in
ACM SIGPLAN NOTICES
2006
Measuring benchmark similarity using inherent program characteristics
A JOSHI
A PHANSALKAR
Lieven Eeckhout
K JOHN
A1
Journal Article
in
IEEE TRANSACTIONS ON COMPUTERS
2006
Microarchitecture-Independent Cache Modeling for Statistical Simulation
Davy Genbrugge
Lieven Eeckhout
Koen De Bosschere
C1
Conference
2006
NSL-BLRL: Efficient Cache Warmup for Sampled Processor Simulation
Luk Van Ertvelde
Filip Hellebaut
Lieven Eeckhout
Koen De Bosschere
C1
Conference
2006
NSL-BLRL: Efficient cache warm'up for sampled processor simulation
Luk Van Ertvelde
Filip Hellebaut
Lieven Eeckhout
Koen De Bosschere
P1
Conference
2006
Pattern-driven prefetching for multimedia applications on embedded processors
H SBEYTI
S NIAR
Lieven Eeckhout
A1
Journal Article
in
JOURNAL OF SYSTEMS ARCHITECTURE
2006
Performance Evaluation and Benchmarking
Book editor
2006
Performance cloning: A technique for disseminating proprietary applications as benchmarks
A JOSHI
Lieven Eeckhout
RH BELL
L JOHN
P1
Conference
2006
Performance prediction based on inherent program similarity
Kenneth Hoste
Aashish Phansalkar
Lieven Eeckhout
Andy Georges
Lizy K John
Koen De Bosschere
C1
Conference
2006
Proceedings of the 9th Workshop on Computer Architecture Evaluation using Commercial Workloads (CAECW-9) held in conjunction with the 12th International Symposium on High Performance Computer Architecture (HPCA-12).
R IYER
Lieven Eeckhout
[0-9]{2}
2006
Proceedings of the Second Annual Workshop on Modeling, Benchmarking and Simulation (MoBS) held in conjunction with the 33rd Annual International Symposium on Computer Architecture (ISCA-33)
Book editor
2006
Space-efficient 64-bit java objects through selective typed virtual addressing
Kris Venstermans
Lieven Eeckhout
Koen De Bosschere
P1
Conference
2006
Statistical Simulation
Lieven Eeckhout
Bookchapter
in
Performance Evaluation and Benchmarking
2006
Statistical Simulation of Chip Multiprocessors
Davy Genbrugge
Lieven Eeckhout
Koen De Bosschere
C1
Conference
2006
The Exigency of Benchmark and Compiler Drift: Designing Tomorrow`s Processors with Yesterday`s Tools
J YI
Hans Vandierendonck
Lieven Eeckhout
D LILJA
C1
Conference
2006
The future of simulation: A field of dreams?
JJ YI
Lieven Eeckhout
DJ LILJA
B CALDER
LK JOHN
JE SMITH
A1
Journal Article
in
COMPUTER
2006
The pitfall in comparing benchmarks using hardware performance counters
Kenneth Hoste
Lieven Eeckhout
C1
Conference
2006
Using Statistical Simulation for Studying Compiler-Microarchitecture Interactions
Lieven Eeckhout
J CAVAZOS
C1
Conference
2006
Yet shorter warmup by combining no-state-loss and MRRL for sampled LRU cache simulation
Lieven Eeckhout
Koen De Bosschere
A1
Journal Article
in
JOURNAL OF SYSTEMS AND SOFTWARE
2006
2005
A detailed study on phase predictors
Frederik Vandeputte
Lieven Eeckhout
Koen De Bosschere
A1
Journal Article
in
LECTURE NOTES IN COMPUTER SCIENCE
2005
Accurate statistical approaches for generating representative workload compositions
Lieven Eeckhout
R Sundareswara
J Yi
D Lilja
P Schrater
P1
Conference
2005
BLRL: Accurate and efficient warmup for sampled processor simulation
Lieven Eeckhout
Y LUO
Koen De Bosschere
LK JOHN
A1
Journal Article
in
COMPUTER JOURNAL
2005
Comparing low-level behavior of SPEC CPU and Java workloads
Andy Georges
Lieven Eeckhout
Koen De Bosschere
A1
Journal Article
in
LECTURE NOTES IN COMPUTER SCIENCE
2005
Efficient sampling startup for sampled processor simulation
Michael VanBiesbrouck
Lieven Eeckhout
Brad Calder
A1
Journal Article
in
LECTURE NOTES IN COMPUTER SCIENCE
2005
Enhanced Statistical Simulation Framework: Accurate Memory Data Flow Model
Davy Genbrugge
Lieven Eeckhout
Koen De Bosschere
C1
Conference
2005
Exploiting program microarchitecture independent characteristics and phase behavior for reduced benchmark suite simulation
Lieven Eeckhout
J Sampson
B Calder
P1
Conference
2005
Garbage collection hints
Dries Buytaert
Kris Venstermans
Lieven Eeckhout
Koen De Bosschere
A1
Journal Article
in
LECTURE NOTES IN COMPUTER SCIENCE
2005
Implicit Typing for 64-bit object header reduction in Java
Kris Venstermans
Lieven Eeckhout
Koen De Bosschere
C1
Conference
2005
Improving Accuracy for Statistical Simulation
Davy Genbrugge
Lieven Eeckhout
Koen De Bosschere
C1
Conference
2005
Java objects without the headers
Kris Venstermans
Lieven Eeckhout
Koen De Bosschere
C1
Conference
2005
Measuring program similarity: Experiments with SPEC CPU benchmark suites
A PHANSALKAR
A JOSHI
Lieven Eeckhout
LK JOHN
P1
Conference
2005
Middleware benchmarking: approaches, results, experiences
P BREBNER
E CECCHET
J MARGUERITE
P TUMA
O CIUHANDU
B DUFOUR
Lieven Eeckhout
S FRENOT
AS KRISHNA
J MURPHY
et al.
A1
Journal Article
in
CONCURRENCY AND COMPUTATION-PRACTICE & EXPERIENCE
2005
Offline phase analysis and optimization for multi-configuration processors
Frederik Vandeputte
Lieven Eeckhout
Koen De Bosschere
A1
Journal Article
in
LECTURE NOTES IN COMPUTER SCIENCE
2005
Optimal sample length for efficient cache simulation
Lieven Eeckhout
S NIAR
Koen De Bosschere
A1
Journal Article
in
JOURNAL OF SYSTEMS ARCHITECTURE
2005
Performance Prediction for Java Applications
Andy Georges
Dries Buytaert
Kris Venstermans
Lieven Eeckhout
Koen De Bosschere
C1
Conference
2005
Program Phase Behavior and Predictability
Frederik Vandeputte
Lieven Eeckhout
Koen De Bosschere
C1
Conference
2005
SMA: A self-monitored adaptive cache warm-up scheme for microprocessor simulation
Y LUO
LK JOHN
Lieven Eeckhout
A1
Journal Article
in
INTERNATIONAL JOURNAL OF PARALLEL PROGRAMMING
2005
The shape of the processor design space and its implications for early stage explorations
Stijn Eyerman
Lieven Eeckhout
Koen De Bosschere
P1
Conference
2005
Using decision trees to improve program-based and profile-based static branch prediction
Veerle Desmet
Lieven Eeckhout
Koen De Bosschere
A1
Journal Article
in
LECTURE NOTES IN COMPUTER SCIENCE
2005
2004
Adaptive prefetching for multimedia applications in embedded systems
H SBEYTI
S NIAR
Lieven Eeckhout
P1
Conference
2004
Bottleneck Analysis in Java Workloads using Hardware Performance Monitors
Dries Buytaert
Andy Georges
Lieven Eeckhout
Koen De Bosschere
C1
Conference
2004
Control flow modeling in statistical simulation for accurate and efficient processor design studies
Lieven Eeckhout
Robert H Jr Bell
Bastiaan Stougie
Koen De Bosschere
Lizy K John
P1
Conference
2004
Deconstructing and Improving Statistical Simulation in HLS
R BELL JR.
Lieven Eeckhout
L JOHN
Koen De Bosschere
C1
Conference
2004
Efficient architectural design of high performance microprocessors
Lieven Eeckhout
Koen De Bosschere
A1
Journal Article
in
ADVANCES IN COMPUTERS, VOL. 61
2004
Efficient simulation of trace samples on parallel machines
Lieven Eeckhout
Koen De Bosschere
A1
Journal Article
in
PARALLEL COMPUTING
2004
Evaluation of the Gini-index for studying branch prediction features
Veerle Desmet
Lieven Eeckhout
Koen De Bosschere
P1
Conference
2004
How accurate should early design stage power/performance tools be? A case study with statistical simulation
Lieven Eeckhout
Koen De Bosschere
A1
Journal Article
in
JOURNAL OF SYSTEMS AND SOFTWARE
2004
Low-level behavioral analysis of the JVT/AVC decoder
Peter Lambert
Lieven Eeckhout
Robbie De Sutter
Koen De Bosschere
Rik Van de Walle
P1
Conference
2004
Method-level phase behavior in Java workloads
Andy Georges
Dries Buytaert
Lieven Eeckhout
Koen De Bosschere
A1
Journal Article
in
ACM SIGPLAN NOTICES
2004
Self-monitored adaptive cache warm-up for microprocessor simulation
Y LUO
LK JOHN
Lieven Eeckhout
P1
Conference
2004
Speeding up architectural simulations for high-performance processors
Lieven Eeckhout
Koen De Bosschere
A1
Journal Article
in
SIMULATION-TRANSACTIONS OF THE SOCIETY FOR MODELING AND SIMULATION INTERNATIONAL
2004
Spotting Java Performance Bottlenecks
Andy Georges
Dries Buytaert
Lieven Eeckhout
Koen De Bosschere
C1
Conference
2004
2003
Accurately Warmed-up Trace Samples for the Evaluation of Cache Memories.
Lieven Eeckhout
Stijn Eyerman
Bert Callens
Koen De Bosschere
C1
Conference
2003
Comparing multiported cache schemes
S NIAR
Lieven Eeckhout
Koen De Bosschere
P1
Conference
2003
Designing computer architecture research workloads
Lieven Eeckhout
Hans Vandierendonck
Koen De Bosschere
A1
Journal Article
in
COMPUTER
2003
Efficient microprocessor design space exploration through statistical simulation
Lieven Eeckhout
Dirk Stroobandt
Koen De Bosschere
P1
Conference
2003
How Java programs interact with virtual machines at the microarchitectural level
Lieven Eeckhout
Andy Georges
Koen De Bosschere
A1
Journal Article
in
ACM SIGPLAN NOTICES
2003
Improved Static Branch Prediction for Weak Dynamic Predictions
Veerle Desmet
Lieven Eeckhout
Koen De Bosschere
C1
Conference
2003
Improved Static Branch Prediction for Weak Dynamic Predictions
Veerle Desmet
Lieven Eeckhout
Koen De Bosschere
C1
Conference
2003
Investigating the Interaction between Java Programs and Virtual Machines at the Microarchitectural Level
Andy Georges
Lieven Eeckhout
Koen De Bosschere
C1
Conference
2003
Java Programs and Virtual Machines: Observations at the Microarchitectural Level
Andy Georges
Lieven Eeckhout
Koen De Bosschere
C1
Conference
2003
Quantifying behavioral differences between multimedia and general-purpose workloads
Lieven Eeckhout
Koen De Bosschere
A1
Journal Article
in
JOURNAL OF SYSTEMS ARCHITECTURE
2003
Quantifying the Impact of Input Data Sets on Program Behavior and its Applications
Lieven Eeckhout
Hans Vandierendonck
Koen De Bosschere
A2
Journal Article
in
Journal of Instruction-Level Parallelism
2003
Selecting a Reduced but Representative Workload
Lieven Eeckhout
Andy Georges
Koen De Bosschere
C1
Conference
2003
Statistical simulation: Adding efficiency to the computer designer's toolbox
Lieven Eeckhout
S NUSSBAUM
JE SMITH
Koen De Bosschere
A1
Journal Article
in
IEEE MICRO
2003
Statistische modellering van computerprogramma\'s
Lieven Eeckhout
Dissertation
2003
2002
Accurate Statistical Workload Modeling.
Lieven Eeckhout
Koen De Bosschere
C1
Conference
2002
How Input Data Sets Change Program Behaviour.
Lieven Eeckhout
Hans Vandierendonck
Koen De Bosschere
C1
Conference
2002
Optimizing a 3D Image Reconstruction Algorithm: Investigating the Interaction between the High-Level Implementation, the Compiler and the Architecture.
T VANDER AA
Lieven Eeckhout
Bart Goeman
Hans Vandierendonck
T VAN ACHTEREN
R LAUWEREINS
Koen De Bosschere
C1
Conference
2002
Workload design: selecting representative program-input pairs
Lieven Eeckhout
Hans Vandierendonck
Koen De Bosschere
P1
Conference
2002
2001
Application domains for fixed-length block structured architectures
Lieven Eeckhout
T Vander Aa
Bart Goeman
Hans Vandierendonck
R Lauwereins
Koen De Bosschere
P1
Conference
2001
Early design phase power/performance modeling through statistical simulation
Lieven Eeckhout
Koen De Bosschere
P1
Conference
2001
Hybrid analytical-statistical modeling for efficiently exploring architecture and workload design spaces
Lieven Eeckhout
Koen De Bosschere
P1
Conference
2001
Increasing the accuracy of statistical simulation for modeling superscalar processors
Lieven Eeckhout
Koen De Bosschere
P1
Conference
2001
Nonuniform behavior in instruction traces for contemporary processors
Lieven Eeckhout
Koen De Bosschere
P1
Conference
2001
Statistical Simulation of Superscalar Architectures using Commercial Workloads
Lieven Eeckhout
Koen De Bosschere
C1
Conference
2001
2000
Early design stage exploration of fixed-length block structured architectures.
Lieven Eeckhout
Henk Neefs
Koen De Bosschere
A1
Journal Article
in
JOURNAL OF SYSTEMS ARCHITECTURE
2000
Estimating IPC of a Block Structured Instruction Set Architecture in an Early Design Stage. Parallel Computing: Fundamentals and Applications ;.
Lieven Eeckhout
Henk Neefs
Koen De Bosschere
C1
Conference
2000
On the Feasibility of Fixed-Length Block Structured Architectures.
Lieven Eeckhout
Koen De Bosschere
Henk Neefs
C1
Conference
2000
Performance Analysis through Synthetic Trace Generation
Lieven Eeckhout
Koen De Bosschere
Henk Neefs
C1
Conference
2000
1999
Investigating the Implementation of a Block Structured Processor Architecture in an Early Design Stage.
Lieven Eeckhout
Henk Neefs
Koen De Bosschere
Jan Van Campenhout
C1
Conference
1999
On the Benefits of a Block Structured Instruction Set Architecture.
Lieven Eeckhout
Henk Neefs
Koen De Bosschere
C1
Conference
1999
On the Organization and Implementation of a Fixed-Length Block Structured Instruction Set Architecture.
Lieven Eeckhout
Henk Neefs
Koen De Bosschere
Jan Van Campenhout
C1
Conference
1999
1998
Aspects of a Fixed-Length Block Structured Instruction Set to Improve Loop Performance
Lieven Eeckhout
Henk Neefs
Koen De Bosschere
Jan Van Campenhout
C1
Conference
1998
Improving Loop Performance on a Block Structured Architecture through Predication
Lieven Eeckhout
Henk Neefs
Koen De Bosschere
Jan Van Campenhout
C1
Conference
1998