Manage settings
MENU
About this site
In het Nederlands
Home
Researchers
Projects
Organisations
Publications
Infrastructure
Contact
Research Explorer
Your browser does not support JavaScript or JavaScript is not enabled. Without JavaScript some functions of this webapplication may be disabled or cause error messages. To enable JavaScript, please consult the manual of your browser or contact your system administrator.
Researcher
Henk Neefs
Profile
Projects
Publications
Activities
Awards & Distinctions
26
Results
2000
A Technique for High Bandwidth and Deterministic Low Latency Load/Store Accesses to Multiple Cache Banks.
Henk Neefs
Hans Vandierendonck
Koen De Bosschere
C1
Conference
2000
Designing a branch predictor for a block structured architecture
Frederik Habils
Henk Neefs
Koen De Bosschere
P1
Conference
2000
Early design stage exploration of fixed-length block structured architectures.
Lieven Eeckhout
Henk Neefs
Koen De Bosschere
A1
Journal Article
in
JOURNAL OF SYSTEMS ARCHITECTURE
2000
Estimating IPC of a Block Structured Instruction Set Architecture in an Early Design Stage. Parallel Computing: Fundamentals and Applications ;.
Lieven Eeckhout
Henk Neefs
Koen De Bosschere
C1
Conference
2000
On the Feasibility of Fixed-Length Block Structured Architectures.
Lieven Eeckhout
Koen De Bosschere
Henk Neefs
C1
Conference
2000
Optoelectronic interconnects for integrated circuits. Achievements 1996-2000.
Henk Neefs
Report
2000
Performance Analysis through Synthetic Trace Generation
Lieven Eeckhout
Koen De Bosschere
Henk Neefs
C1
Conference
2000
1999
Exploitable levels of ILP in future processors.
Henk Neefs
Koen De Bosschere
Jan Van Campenhout
A1
Journal Article
in
JOURNAL OF SYSTEMS ARCHITECTURE
1999
Investigating the Implementation of a Block Structured Processor Architecture in an Early Design Stage.
Lieven Eeckhout
Henk Neefs
Koen De Bosschere
Jan Van Campenhout
C1
Conference
1999
On the Benefits of a Block Structured Instruction Set Architecture.
Lieven Eeckhout
Henk Neefs
Koen De Bosschere
C1
Conference
1999
On the Organization and Implementation of a Fixed-Length Block Structured Instruction Set Architecture.
Lieven Eeckhout
Henk Neefs
Koen De Bosschere
Jan Van Campenhout
C1
Conference
1999
1998
A Quantitative Study of Optical Interconnects at the L2-cache to Main Memory Level in a Uniprocessor
Henk Neefs
P VANHEUVEN
Jan Van Campenhout
[0-9]{2}
1998
Aspects of a Fixed-Length Block Structured Instruction Set to Improve Loop Performance
Lieven Eeckhout
Henk Neefs
Koen De Bosschere
Jan Van Campenhout
C1
Conference
1998
ESCAPE: Environment for the Simulation of Computer Architectures for the Purpose of Education
Jan Van Campenhout
Peter Verplaetse
Henk Neefs
[0-9]{2}
1998
Improving Loop Performance on a Block Structured Architecture through Predication
Lieven Eeckhout
Henk Neefs
Koen De Bosschere
Jan Van Campenhout
C1
Conference
1998
Latency Requirements of Optical Interconnects at Different Memory Hierarchy Levels of a Computer System
Henk Neefs
P VANHEUVEN
Jan Van Campenhout
C1
Conference
1998
Latency requirements of optical interconnects at different memory hierarchy levels of a computer system
Henk Neefs
Pim Van Heuven
Jan Van Campenhout
P1
Conference
1998
Optical Interconnects at the L2 Cache to Main Memory Level in a Computer System and the Effect of Prefetching
Henk Neefs
P VANHEUVEN
Jan Van Campenhout
C1
Conference
1998
1997
An Analytical Model for Performance Estimation of Modern Data-Flow Style Scheduling Microprocessors
Henk Neefs
Koen De Bosschere
Jan Van Campenhout
C1
Conference
1997
Issues in Compilation for Fixed-Length Block Structured Instruction Set Architectures
Henk Neefs
Koen De Bosschere
Jan Van Campenhout
C1
Conference
1997
Microarchitectural Issues of a Fixed Length Block Structured Instruction Set Architecture
Henk Neefs
Koen De Bosschere
Jan Van Campenhout
C1
Conference
1997
1996
A C++ Simulator modelling a modern data-flow scheduling Microprocessor
Henk Neefs
Koen De Bosschere
Jan Van Campenhout
C1
Conference
1996
A Microarchitecture for a fixed length Block Structured instruction set Architecture
Henk Neefs
Jan Van Campenhout
C1
Conference
1996
Simulating a Modern Data-flow Scheduling Microprocessor in C++
Henk Neefs
Koen De Bosschere
Jan Van Campenhout
C1
Conference
1996
1995
Arrays of light emitting diodes with integrated diffractive microlenses for board-to-board optical interconnect applications: design, modelling and experimental assessment.
Bart Dhoedt
Peter De Dobbelaere
Johan Blondelle
Peter Van Daele
Piet Demeester
Henk Neefs
Jan Van Campenhout
Roel Baets
Bookchapter
in
CLEO EUROPE '94
1995
1994
A Optoelectronic 3-D Field Programmable Gate Arra. , Prague, 1994.
Jo Depreitere
Henk Neefs
Herwig Van Marck
Jan Van Campenhout
Roel Baets
Bart Dhoedt
Hugo Thienpont
I VERETENNICOFF
C1
Conference
1994