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Onderzoeker
Hans Vandierendonck
Profiel
Projecten
Publicaties
Activiteiten
Prijzen & Erkenningen
75
Resultaten
2011
A programming model for deterministic task parallelism
Polyvios Pratikakis
Hans Vandierendonck
Spyros Lyberis
Dimitrios S Nikolopoulos
C1
Conferentie
2011
A unified scheduler for recursive and task dataflow parallelism
Hans Vandierendonck
George Tzenakis
Dimitrios S Nikolopoulos
C1
Conferentie
2011
Application-based workload model for wireless sensor node computing platforms
Thibault Delavallee
Philippe Manet
Igor Loiselle
Hans Vandierendonck
Jean-Didier Legat
C1
Conferentie
2011
Automatic parallelization in the paralax compiler
Hans Vandierendonck
Koen De Bosschere
C1
Conferentie
2011
Averting the next software crisis
Hans Vandierendonck
Tom Mens
Redactioneel materiaal
2011
Embedding functional simulators in compilers for debugging and profiling
Thibault Delavallee
Philippe Manet
Hans Vandierendonck
Jean-Didier Legat
C1
Conferentie
2011
Fairness metrics for multi-threaded processors
Hans Vandierendonck
Andre Seznec
A2
Artikel in een tijdschrift
in
IEEE COMPUTER ARCHITECTURE LETTERS
2011
Parallel programming of general-purpose programs using task-based programming models
Hans Vandierendonck
Polyvios Pratikakis
Dimitrios S Nikolopoulos
C1
Conferentie
2011
Whole-array SSA: an intermediate representation of memory for trading-off precision against complexity
Hans Vandierendonck
Koen De Bosschere
C1
Conferentie
2011
2010
A methodology for precise comparisons of processor core architectures for homogeneous many-core DSP platforms
Bertrand Rousseau
Philippe Manet
Igor Loiselle
Jean-Didier Legat
Hans Vandierendonck
C1
Conferentie
2010
A profile-based tool for finding pipeline parallelism in sequential programs
Sean Rul
Hans Vandierendonck
Koen De Bosschere
A1
Artikel in een tijdschrift
in
PARALLEL COMPUTING
2010
An experimental study on performance portability of OpenCL kernels
Sean Rul
Hans Vandierendonck
Joris D'Haene
Koen De Bosschere
C1
Conferentie
2010
Implicit hints : embedding hint bits in programs without ISA changes
Hans Vandierendonck
Koen De Bosschere
C1
Conferentie
2010
The paralax infrastructure: automatic parallelization with a helping hand
Hans Vandierendonck
Sean Rul
Koen De Bosschere
C1
Conferentie
2010
2009
Accelerating multiple sequence alignment with the cell BE processor
Hans Vandierendonck
Sean Rul
Koen De Bosschere
A1
Artikel in een tijdschrift
in
COMPUTER JOURNAL
2009
Can we apply accelerator-cores to control-intensive programs?
Sean Rul
Hans Vandierendonck
Koen De Bosschere
C1
Conferentie
2009
Factoring out ordered sections to expose thread-level parallelism
Hans Vandierendonck
Sean Rul
Koen De Bosschere
C1
Conferentie
2009
Managing SMT Resource Usage through Speculative Instruction Window Weighting
Hans Vandierendonck
André Seznec
Verslag
2009
Towards automatic program partitioning
Sean Rul
Hans Vandierendonck
Koen De Bosschere
P1
Conferentie
2009
2008
A Dynamic Analysis Tool for Finding Coarse-Grain Parallelism
Sean Rul
Hans Vandierendonck
Koen De Bosschere
C1
Conferentie
2008
Behavior-based branch prediction by dynamically clustering branch instructions
Hans Vandierendonck
Veerle Desmet
Koen De Bosschere
A1
Artikel in een tijdschrift
in
JOURNAL OF INFORMATION SCIENCE AND ENGINEERING
2008
Constructing optimal XOR-functions to minimize cache conflict misses
Hans Vandierendonck
Koen De Bosschere
P1
Conferentie
2008
Detecting the Existence of Coarse-Grain Parallelism in General-Purpose Programs
Sean Rul
Hans Vandierendonck
Koen De Bosschere
C1
Conferentie
2008
Experiences with Parallelizing a Bio-informatics Program on the Cell BE
Hans Vandierendonck
Sean Rul
Michiel Questier
Koen De Bosschere
P1
Conferentie
2008
Extracting Coarse-Grain Parallelism in General-Purpose Programs
Sean Rul
Hans Vandierendonck
Koen De Bosschere
C3
Conferentie
2008
Speculative Return Address Stack management revisited
Hans Vandierendonck
Andre Seznec
A1
Artikel in een tijdschrift
in
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION
2008
2007
By-Passing the Out-of-Order Execution Pipeline to Increase Energy-Efficiency
Hans Vandierendonck
P MANET
T DELAVALLEE
I LOISELLE
J LEGAT
C1
Conferentie
2007
Clustered indexing for branch predictors
Veerle Desmet
Hans Vandierendonck
Koen De Bosschere
A1
Artikel in een tijdschrift
in
MICROPROCESSORS AND MICROSYSTEMS
2007
Detection of Coarse-grain Parallelism
Sean Rul
Hans Vandierendonck
Koen De Bosschere
C1
Conferentie
2007
Detection of Function-level Parallelism
Sean Rul
Hans Vandierendonck
Koen De Bosschere
C1
Conferentie
2007
Fetch gating control through speculative instruction window weighting
Hans Vandierendonck
Andre Seznec
P1
Conferentie
2007
Function level parallelism driven by data dependencies
Sean Rul
Hans Vandierendonck
Koen De Bosschere
A2
Artikel in een tijdschrift
in
COMPUTER ARCHITECTURE NEWS
2007
2006
A Formal Model for Microprocessor Caches
Hans Vandierendonck
J JACQUET
B NOOTAERT
Koen De Bosschere
C1
Conferentie
2006
Application-specific reconfigurable XOR-indexing to eliminate cache conflict misses
Hans Vandierendonck
P MANET
JD LEGAT
P1
Conferentie
2006
Building and Validating a Reduced TPC-H Benchmark
Hans Vandierendonck
P TRANCOSO
C1
Conferentie
2006
Classifying Data Dependencies Between Functions
Sean Rul
Hans Vandierendonck
Koen De Bosschere
C1
Conferentie
2006
Conflict Avoiding Caches Invite New Data Layout Optimizations
B NOOTAERT
Hans Vandierendonck
Koen De Bosschere
C1
Conferentie
2006
Formally Modeling Microprocessor Caches and Branch Predictors
Hans Vandierendonck
J JACQUET
B NOOTAERT
Koen De Bosschere
A2
Artikel in een tijdschrift
in
WSEAS Transactions on Computers
2006
Function Level Parallelism Driven by Data Dependencies
Sean Rul
Hans Vandierendonck
Koen De Bosschere
C1
Conferentie
2006
Function Level Parallelism Lead by Data Dependencies
Sean Rul
Hans Vandierendonck
Koen De Bosschere
C1
Conferentie
2006
Function Level Parallelism Lead by Data Dependencies
Sean Rul
Hans Vandierendonck
Koen De Bosschere
C1
Conferentie
2006
On the Impact of OS and Linker Effects on Level-2 Cache Performance
Hans Vandierendonck
Koen De Bosschere
C1
Conferentie
2006
Study of Parallelism between memory accesses for multi-bank architectures
I LOISELLE
T DELAVALLEE
P MANET
Hans Vandierendonck
J LEGAT
[0-9]{2}
2006
The Exigency of Benchmark and Compiler Drift: Designing Tomorrow`s Processors with Yesterday`s Tools
J YI
Hans Vandierendonck
Lieven Eeckhout
D LILJA
C1
Conferentie
2006
2005
2FAR: A 2bcgskew Predictor Fused by an Alloyed Redundant History Skewed Perceptron Branch Predictor
Veerle Desmet
Hans Vandierendonck
Koen De Bosschere
A2
Artikel in een tijdschrift
in
Journal of Instruction-Level Parallelism. www.jilp.org/vol7.
2005
Alignment of matrices when using XOR-based hashing
Bavo Nootaert
Hans Vandierendonck
Koen De Bosschere
C1
Conferentie
2005
Interference in Branch Predictors: A Systematic Approach
Veerle Desmet
Hans Vandierendonck
Koen De Bosschere
C1
Conferentie
2005
The placement of matrices when using XOR-based hashing
Bavo Nootaert
Hans Vandierendonck
Koen De Bosschere
C1
Conferentie
2005
XOR-based hash functions
Hans Vandierendonck
Koen De Bosschere
A1
Artikel in een tijdschrift
in
IEEE TRANSACTIONS ON COMPUTERS
2005
2004
Eccentric and fragile benchmarks
Hans Vandierendonck
Koen De Bosschere
P1
Conferentie
2004
Experiments with Subsetting Benchmark Suites
Hans Vandierendonck
Koen De Bosschere
C1
Conferentie
2004
Many Benchmarks Stress the Same Bottlenecks
Hans Vandierendonck
Koen De Bosschere
C1
Conferentie
2004
On generating set index functions for randomized caches
Hans Vandierendonck
Koen De Bosschere
A1
Artikel in een tijdschrift
in
COMPUTER JOURNAL
2004
Trade-offs for skewed-associative caches
Hans Vandierendonck
Koen De Bosschere
P1
Conferentie
2004
2003
Designing computer architecture research workloads
Lieven Eeckhout
Hans Vandierendonck
Koen De Bosschere
A1
Artikel in een tijdschrift
in
COMPUTER
2003
Highly accurate and efficient evaluation of randomising set index functions
Hans Vandierendonck
Koen De Bosschere
A1
Artikel in een tijdschrift
in
JOURNAL OF SYSTEMS ARCHITECTURE
2003
On the side-effects of code abstraction
Bjorn De Sutter
Hans Vandierendonck
Bruno De Bus
Koen De Bosschere
A1
Artikel in een tijdschrift
in
ACM SIGPLAN NOTICES
2003
On the use of statistical data analysis techniques in workload characterization
Hans Vandierendonck
Koen De Bosschere
C1
Conferentie
2003
On the use of statistical data analysis techniques in workload characterization
Hans Vandierendonck
Koen De Bosschere
C1
Conferentie
2003
Quantifying the Impact of Input Data Sets on Program Behavior and its Applications
Lieven Eeckhout
Hans Vandierendonck
Koen De Bosschere
A2
Artikel in een tijdschrift
in
Journal of Instruction-Level Parallelism
2003
Randomized caches for power-efficiency
Hans Vandierendonck
Koen De Bosschere
A1
Artikel in een tijdschrift
in
IEICE TRANSACTIONS ON ELECTRONICS
2003
Trace substitution
Hans Vandierendonck
Hans Logie
Koen De Bosschere
A1
Artikel in een tijdschrift
in
LECTURE NOTES IN COMPUTER SCIENCE
2003
2002
A Comparative Study of Redundancy in Trace Caches.
Hans Vandierendonck
A RAMIREZ
Koen De Bosschere
M VALERO
C1
Conferentie
2002
An address transformation combining block- and word-interleaving
Hans Vandierendonck
Koen De Bosschere
A2
Artikel in een tijdschrift
in
COMPUTER ARCHITECTURE LETTERS
2002
Efficient Evaluation of Randomising Set Index Functions for Cache Memories.
Hans Vandierendonck
C1
Conferentie
2002
Evaluation of the Performance of Polynomial Set Index Functions.
Hans Vandierendonck
Koen De Bosschere
C1
Conferentie
2002
How Input Data Sets Change Program Behaviour.
Lieven Eeckhout
Hans Vandierendonck
Koen De Bosschere
C1
Conferentie
2002
Optimizing a 3D Image Reconstruction Algorithm: Investigating the Interaction between the High-Level Implementation, the Compiler and the Architecture.
T VANDER AA
Lieven Eeckhout
Bart Goeman
Hans Vandierendonck
T VAN ACHTEREN
R LAUWEREINS
Koen De Bosschere
C1
Conferentie
2002
Workload design: selecting representative program-input pairs
Lieven Eeckhout
Hans Vandierendonck
Koen De Bosschere
P1
Conferentie
2002
2001
Application domains for fixed-length block structured architectures
Lieven Eeckhout
T Vander Aa
Bart Goeman
Hans Vandierendonck
R Lauwereins
Koen De Bosschere
P1
Conferentie
2001
Differential FCM : increasing value prediction accuracy by improving table usage efficiency
Bart Goeman
Hans Vandierendonck
Koen De Bosschere
P1
Conferentie
2001
Efficient profile-based evaluation of randomising set index functions for cache memories
Hans Vandierendonck
Koen De Bosschere
P1
Conferentie
2001
2000
A Technique for High Bandwidth and Deterministic Low Latency Load/Store Accesses to Multiple Cache Banks.
Henk Neefs
Hans Vandierendonck
Koen De Bosschere
C1
Conferentie
2000
A comparison of locality-based and recency-based replacement policies.
Hans Vandierendonck
Koen De Bosschere
A1
Artikel in een tijdschrift
in
HIGH PERFORMANCE COMPUTING, PROCEEDINGS
2000
An Optimal Replacement Policy for Balancing Multi-Module Caches.
Hans Vandierendonck
Koen De Bosschere
C1
Conferentie
2000