Project

protections for system level ESD

Acronym
PROSE
Code
179Q4510
Duration
01 January 2010 → 30 June 2012
Funding
Private funding via IWT/VLAIO
Research disciplines
  • Natural sciences
    • Applied mathematics in specific fields
Keywords
wave-form visualization
 
Project description

This wave-sampling solution will allow to reconstruct an image of the current and/or voltage waveforms occurring on a protected IO pad of a standard IC. The work is targeted specifically at System-ESD type of pulses which form a special family of pulses described in [1]. Application specifications often requires IC's to be able to withstand such pulses during normal operations, hence the need to accurately characterize their shape.
The wave-sampling solution will provide complementary information with respect to other wave-form visualization techniques which will be applied during the project and mainly rely on off-chip calibration devices and hence only enable to reconstruct waveforms at the external IC pins.