NEoteRIC’ primary objective is the generation of holistic photonic machine learning paradigms that will address demanding imaging applications in an unconventional approach providing paramount frame rate increase, classification performance enhancement and orders of magnitude lower power consumption compared to the state-of-the-art machine learning approaches. NEoteRIC’ implementation stratagem incorporates multiple innovations spanning from the photonic “ransistor”level and extending up to the system architectural level, thus paving new, unconventional routes to neuromorphic performance enhancement. The technological cornerstone of NEoteRIC relies on the development and upscaling of a high-speed reconfigurable photonic FPGA-like circuit that will incorporate highly-dense and fully reconfigurable key silicon photonic components (ring resonators, MZIs, etc.). High-speed reconfigurability will unlock the ability to restructure the photonic components and rewire inter-component connections. Through NEoteRIC the integrated photonic FPGAs will be strengthened by the incorporation of novel marginal-power consuming non-volatile high-speed phase shifters that will push the boundaries of energy consumption. NEoteRIC’ “nconventional”chips will be utilized as a proliferating neuromorphic computational platform that will merge the merits of photonic and electronic technology and will allow the alloptical implementation of powerful non-von Neumann architectures such as Reservoir Computing, Recurrent Neural Networks, Deep Neural Networks and Convolutional Neural Networks simultaneously by the same photonic chip. The in-project excellence will be tested through demanding high impact application such as high frame-rate image analysis and in particular single-pixel time-stretch modalities thus pushing the boundaries of state-of-the-art; exhibiting simultaneous high spatial resolution and Gframe/sec processing rate.