Code
3S013516
Duration
01 January 2016 → 31 December 2019
Funding
Research Foundation - Flanders (FWO)
Promotor
Fellow
Research disciplines
-
Engineering and technology
- Communications
- Communications technology
- Electronics
- Modelling
- Multimedia processing
- Nanotechnology
- Design theories and methods
Keywords
burst mode
multi gigabit clock and data recovery
multilevel
Project description
The upstream communication in TDM-PON access networks operates in burst-mode. With increasing data rates, it becomes increasingly challenging to design such very fast synchronizing burst mode receivers. The goal of this project is to research burst mode clock and data recovery circuits with digital PLL techniques to decrease the lock time.