The research to be conducted focuses on the realization of photonic and electronic integrated circuits intended for high-speed transceivers. Applications such as artificial intelligence, machine learning, etc., require the processing of very large amounts of data. In particular, training large language models (LLMs), which can now contain up to one trillion parameters, is done using tens of thousands of computational processing units, which are arranged in racks within large data centers. Training LLMs requires the exchange of enormous amounts of data (tens of terabits per second per network processor is common) both between the processing units themselves and between various forms of memory storage. A large part of the data flow within data centers is transported via a complex hierarchical optical network. Further scaling of LLM capabilities requires these networks and associated optical transceivers to handle an exponentially growing amount of data. Current state-of-the-art optical transceivers have a bandwidth of 800Gb/s to 1.6Tb/s. It is expected that this bandwidth will need to scale to 3.2Tb/s and even 6.4Tb/s by the end of this decade. To achieve this, it will be necessary to increase both the transmission speed (expressed as baud rate, which is the number of symbols per second), the number of channels per transceiver (either the number of optical fibers or the number of optical wavelengths), and the complexity of the transmitted symbols (constellation).

An optical transceiver is typically integrated into a module (the size of a matchbox) today and includes photonic circuits (modulators, detectors, as well as one or more lasers), electronic circuits (high-speed analog amplifiers, data converters, and digital signal processing), and supporting components (such as those providing laser cooling). The increasingly complex photonic circuits (e.g., higher number of channels) have made the process of realizing these circuits today preferably more Silicon Photonics. The analog amplifiers are often realized using SiGe BiCMOS (relying on ultra-fast heterojunction bipolar transistors), and possibly even InP (indium phosphide, a material that allows for particularly fast transistors). The data converters and sophisticated digital signal processing are typically realized in very advanced CMOS processes, such as 5nm FinFET, or nowadays even 2nm CMOS gate-all-around technology.

This research specifically focuses on increasing both the complexity of the transmitted symbols (thereby increasing the number of bits transmitted per symbol) and the transmission speed. Concrete goals are to demonstrate “dual-polarization, quadrature shift-keying” (DP-QPSK, 4 bits per symbol), “dual-polarization, 16-ary quadrature amplitude modulation” (DP 16-QAM), and very high-speed 4-level pulse amplitude modulation (PAM-4). Moreover, transmission speeds far beyond the current state-of-the-art ~100Gbaud are targeted. This ambition requires innovation in several areas, as discussed in more detail below:

1. Realization of the photonic part of the optical transceiver, relying on new platforms being developed by imec and Ghent University. This may involve a Silicon Photonic platform, where new materials such as III-V (InP), LiNbO3, or BTO are aimed at achieving more performant optical modulators. A particular challenge is the realization of a sufficiently broadband (electro-optical bandwidth >100GHz) optical modulator, where the use of III-V or LiNbO3 is critical.
2. Realization of InP-based modulator driver electronics, focusing on very high bandwidths (far beyond 100GHz). This electronics needs to be optimized together with the optical modulators, where choices such as voltage swing, impedance level, and “peaking” need to be carefully balanced against each other.
3. Realization of ultra-high-speed data converters, relying on scaled CMOS processes. Again, this needs to be carefully optimized together with the analog electronics.

The above realizations rely on a large portfolio of projects running within the IDLab design ZAP team. The BOF funding will be specifically used to realize demonstrators based on the aforementioned components. The funding will particularly allow for the construction and testing of several specific demonstrators that are not possible with the current project portfolio. For example, this includes:

1. A demonstrator of a >100GHz optical modulator assembled with the InP broadband amplifier,
2. A demonstrator of an optical transmitter based on a 5nm data converter, InP broadband amplifier, and >100GHz optical modulator.