Due to CMOS technology scaling, conventional analog-to-digital converter (ADC) paradigms are reaching their limits. For this reason, less-conventional analog-to-digital converter structures such as voltage-controlled oscillators (VCOs) will be needed in the future. In theory, such VCO ADCs can have an equal or even better efficiency than the best conventional ADCs. Unfortunately, until now, this high efficiency has only been demonstrated for relatively low bandwidths (for instance audio). In particular for the bandwidth range of 10 to 100 MHz, there is a significant performance gap. This frequency range is important for a variety of applications, e.g. ultrasound imaging, high bandwidth current sensors, broadband AM/FM. It is the objective of this PhD research project to close this performance gap. For this, new and improved readout circuits will be invented. These improved readout circuits will enable more sophisticated readout architectures with better resolution compared to existing solutions. These architectures will be optimized and developed up to the level of fully functional integrated circuits.