Project

Dependable performance on many-thread processors (DPMP)

Acronym
DPMP
Code
41E01210
Duration
01 October 2010 → 30 September 2016
Funding
European funding: framework programme
Research disciplines
  • Natural sciences
    • Applied mathematics in specific fields
    • Computer architecture and networks
    • Distributed computing
    • Information sciences
    • Information systems
    • Programming languages
    • Scientific computing
    • Theoretical computer science
    • Visual computing
    • Other information and computing sciences
  • Engineering and technology
    • Computer hardware
    • Computer theory
    • Scientific computing
    • Other computer engineering, information technology and mathematical engineering
Keywords
hardware/software interactions computer architecture performance modeling
 
Project description

Contemporary microprocessors seek at improving perfomance through thread-level parallelism by co-executing multiple threads on a single microprocessor chip. Many-thread processors, however, lead to non-dependable performance: co-executing threads affect each other's performance in unpredictable ways because of resource sharing across threads. DPMP envisions that performance introspection using a cycle accounting architecture that estimates single-thread progress during many-thread execution. The ability to track per-thread progress enables system software to deliver dependable performance by assigning hardware resources to threads depending on their relative progress.