Research Explorer

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Researcher

Zhe Lou

Awards & Distinctions

13 Results

2004

D-type flip-flop Synchronizes Multiplexer Data

A2 Journal Article in Electronic design

FPGA-configuration scheme is flexible

A4 Journal Article in EDN Europe

FPGA-configuration scheme is flexible

A1 Journal Article in EDN

FSAN GPON upstream burst-mode transmission experiments

Xing-Zhi QiuPeter OssieurJohan BauwelinckYanchun YiDieter VerhulstStefaan VerschuereZhe LouWei ChenYves MartensXin Yin et al.

The integration and evaluation of GPON uplink optical Front Ends

Yanchun YiDieter VerhulstStefaan VerschuereZhe LouPeter OssieurJohan Bauwelinck

2003

A Java-Based Embedded Digital Signal Processing System

Zhe LouStefaan VerschuereJo PletinckxXing-Zhi QiuJan Vandewege

Bookchapter in Wseas Transactions on Computers

A Java-based embedded digital signal processing system

Zhe LouStefaan VerschuereJo PletinckxXing-Zhi QiuJan Vandewege

A novel low-memory SPIHT codec for embedded progressive wavelet-based image compression

Zhe LouXing-Zhi QiuStefaan VerschuereJo PletinckxJan Vandewege

An FPGA-based lab test bed for a Gigabit passive optical network

Stefaan VerschuereZhe LouYanchun YiDieter VerhulstXing-Zhi QiuJan Vandewege

Lab test bed development for evaluation of the GigaPON uplink performance

Zhe LouStefaan VerschuereYanchun YiDieter VerhulstXing-Zhi QiuJan Vandewege

Web-based embedded control platform

Zhe LouJo PletinckxStefaan VerschuereXing-Zhi QiuJan Vandewege

Web-based embedded control platform

Zhe LouJo PletinckxStefaan VerschuereX QIUJan Vandewege

2002

Theoretical and expermimental study of turn on delay in a GigaPON system with pre-biasing bits.

Dieter VerhulstYC YIJohan BauwelinckXing-Zhi QiuS VERSCHUEREZhe LouJan Vandewege