Research Explorer

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Researcher

Wim Heirman

Awards & Distinctions

61 Results

2016

Boosting the priority of garbage: scheduling collection on heterogeneous multicore processors

Shoaib AkramJennifer SartorKenzo Van CraeynestWim HeirmanLieven Eeckhout

A1 Journal Article in ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION

2014

BarrierPoint: sampled simulation of multi-threaded applications

Trevor CarlsonWim HeirmanKenzo Van CraeynestLieven Eeckhout

Node performance and energy analysis with the sniper multi-core simulator

Trevor CarlsonWim HeirmanKenzo Van CraeynestLieven Eeckhout

Bookchapter in Tools for high performance computing 2013

Undersubscribed threading on clustered cache architectures

Wim HeirmanTrevor CarlsonKenzo Van CraeynestIbrahim HurAamer JaleelLieven Eeckhout

2013

Fairness-aware scheduling on single-ISA heterogeneous multi-cores

Kenzo Van CraeynestShoaib AkramWim HeirmanAamer JaleelLieven Eeckhout

Making communication a first-class citizen in multicore partitioning

Poona BahrebarRuxandra-Marina FloreaWim HeirmanLeon DenisAdrian MunteanuDirk Stroobandt

Node performance and energy analysis with the sniper multi-core simulator

Trevor CarlsonWim HeirmanKenzo Van CraeynestLieven Eeckhout

PCantorSim: accelerating parallel architecture simulation through fractal-based sampling

Chuntao JiangZhibin YuHai JinChengzhong XuLieven EeckhoutWim HeirmanTrevor CarlsonXiaofei Liao

A1 Journal Article in ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION

Reconfigurable networks-on-chip

Wim HeirmanIñigo ArtundoChristof Debaes

Bookchapter in Integrated optical interconnect architectures for embedded systems

Sampled simulation of multi-threaded applications

Trevor CarlsonWim HeirmanLieven Eeckhout

2012

A human-friendly way of programming robots

Francis wyffelsKarel BruneelPeter BertelsMichiel D'HaeneWim HeirmanTim Waegeman

Dynamic exploration of data transfers in WSS decoder

Poona BahrebarWim HeirmanDirk Stroobandt

Power aware early design stage hardware software co-optimization

Souradip SarkarWim HeirmanTrevor CarlsonLieven Eeckhout

Power-aware multi-core simulation for early design stage hardware/software co-optimization

Wim HeirmanSouradip SarkarTrevor CarlsonIbrahim HurLieven Eeckhout

Sniper: scalable and accurate parallel multi-core simulation

Wim HeirmanTrevor CarlsonLieven Eeckhout

The impact of global communication latency at extreme scales on Krylov methods

Thomas J AshbyPieter GhyselsWim HeirmanWim Vanroose

2011

Dynamic data folding with parameterizable FPGA configurations

Karel BruneelWim HeirmanDirk Stroobandt

A1 Journal Article in ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS

Evaluating application vulnerability to soft errors in multi-level cache hierarchy

Zhe MaTrevor CarlsonWim HeirmanLieven Eeckhout

RecoNoC: a reconfigurable network-on-chip

Robbe VancayseeleBrahim Al FarisiWim HeirmanKarel BruneelDirk Stroobandt

Sniper: exploring the level of abstraction for scalable and accurate parallel multi-core simulation

Trevor CarlsonWim HeirmanLieven Eeckhout

Using cycle stacks to understand scaling bottlenecks in multi-threaded workloads

Wim HeirmanTrevor CarlsonShuai CheKevin SkadronLieven Eeckhout

Using fast and accurate simulation to explore hardware/software trade-offs in the multi-core era

Wim HeirmanTrevor CarlsonSouradip SarkarPieter GhyselsWim VanrooseLieven Eeckhout

2010

Cycle-accurate evaluation of reconfigurable photonic networks-on-chip

Christof DebaesIñigo ArtundoWim HeirmanJan Van CampenhoutHugo Thienpont

Performance evaluation for passive-type optical network-on-chip

Atef AllamIan O'ConnorWim Heirman

PinComm: characterizing intra-application communication for the many-core era

Wim HeirmanDirk StroobandtNarasinga Rao MiniskarRoel WuytsFrancky Catthoor

PinComm: characterizing intra-application communication for the many-core era

Wim HeirmanDirk Stroobandt

2009

A communication profiler to optimize embedded resource usage

Wim HeirmanDirk StroobandtNarasinga Rao MiniskarRoel Wuyts

Architectural study of reconfigurable photonic networks-on-chip for multi-core processors

Christof DebaesIñigo ArtundoWim HeirmanMikel LoperenaJan Van CampenhoutHugo Thienpont

Efficient memory management for hardware accelerated Java Virtual Machines

Peter BertelsWim HeirmanErik D'HollanderDirk Stroobandt

A1 Journal Article in ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS

Low-power reconfigurable network architecture for on-chip photonic interconnects

Iñigo ArtundoWim HeirmanChristof DebaesMikel LoperenaJan Van CampenhoutHugo Thienpont

Reconfigurable optical interconnection networks for shared-memory multiprocessor architectures

Strategies for dynamic memory allocation in hybrid architectures

Peter BertelsWim HeirmanDirk Stroobandt

2008

Design of a reconfigurable optical interconnect for large-scale multiprocessor networks

Inigo ArtundoWim HeirmanChristof DebaesJoni DambreJan Van CampenhoutHugo Thienpont

Efficient Measurement of Data Flow Enabling Communication-Aware Parallelisation

Peter BertelsWim HeirmanDirk Stroobandt

Predicting the performance of reconfigurable optical interconnects in distributed shared-memory systems

Wim HeirmanJoni DambreI ARTUNDOC DEBAESHugo ThienpontDirk StroobandtJan Van Campenhout

A1 Journal Article in PHOTONIC NETWORK COMMUNICATIONS

Reconfigurable Optical Interconnection Networks for Shared-Memory Multiprocessor Architectures

Wim HeirmanJan Van Campenhout

Rent's rule and parallel programs: characterizing network traffic behavior

Wim HeirmanJoni DambreDirk StroobandtJan Van Campenhout

Runtime variability in scientific parallel applications

Wim HeirmanJoni DambreDirk StroobandtJan Van Campenhout

2007

Performance Evaluation of Large Reconfigurable Interconnects for Multiprocessor Systems

Wim HeirmanI ARTUNDOJoni DambreC DEBAEST PHAM DOANK BUI VIETHugo ThienpontJan Van Campenhout

Performance of large-scale reconfigurable optical interconnection networks in DSM systems

I ArtundoWim HeirmanC DebaesJoni DambreJan Van CampenhoutHugo Thienpont

Predicting reconfigurable interconnect performance in distributed shared-memory systems

Wim HeirmanJoni DambreI ARTUNDOC DEBAESHugo ThienpontDirk StroobandtJan Van Campenhout

A1 Journal Article in INTEGRATION-THE VLSI JOURNAL

Synthetic traffic generation as a tool for dynamic interconnect evaluation

Wim HeirmanJoni DambreJan Van Campenhout

2006

Congestion Modeling for Reconfigurable Inter-Processor Networks

Wim HeirmanJoni DambreJan Van Campenhout

Identifying Program Phase Behavior in Parallel Programs on Distributed Shared-memory Systems

Frederik VandeputteLieven EeckhoutKoen De BosschereWim Heirman

Predicting the Performance of Reconfigurable Interconnects in Distributed Shared-Memory Systems

Wim HeirmanJoni DambreI ARTUNDOC DEBAESHugo ThienpontDirk StroobandtJan Van Campenhout

Predicting the Performance of Reconfigurable Interconnects in Shared-Memory Systems

Wim HeirmanJoni DambreJan Van Campenhout

Reconfigurable Optical Networks for On-Chip Multiprocessors

Wim HeirmanJoni DambreI O'CONNORJan Van Campenhout

Reconfigurable interconnection networks in Distributed Shared Memory systems: a study on communication patterns

BV KHOIPD TINHNN QUANI ARTUDOD MANJARRESWim HeirmanC DEBAESJoni DambreJan Van CampenhoutHugo Thienpont

Reconfigurable interconnects in DSM systems: a focus on context switch behavior

I ArtundoD ManjarresWim HeirmanC DebaesJoni DambreJan Van CampenhoutH Thienpont

Selective optical broadcast component for reconfigurable multiprocessor, interconnects

I ARTUNDOL DESTNETWim HeirmanC DEBAESJoni DambreJan Van CampenhoutHugo Thienpont

A1 Journal Article in IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS

Selective optical broadcasting in reconfigurable multiprocessor interconnects - art. no. 61850J

I ARTUNDOL DESMETWim HeirmanC DEBAESJoni DambreJan Van Campenhout

Speeding up multiprocessor machines with reconfigurable optical interconnects - art. no. 61240K

Wim HeirmanI ARTUNDOL DESMETJoni DambreC DEBAESHugo ThienpontJan Van Campenhout

2005

Predicting the Performance of Reconfigurable Interconnects in Distributed Shared-Memory Systems

Wim HeirmanJoni DambreJan Van Campenhout

Prediction Model for Evaluation of Reconfigurable Interconnects in Distributed Shared-Memory Systems

Wim HeirmanJoni DambreDirk StroobandtJan Van CampenhoutC DEBAESHugo Thienpont

Reconfigurable Optical Interconnects for Distributed Shared-Memory Multiprocessors

Wim HeirmanJoni DambreJan Van Campenhout

Reconfigurable Optical Interconnects for Distributed Shared-Memory Systems

Wim HeirmanJoni DambreJan Van Campenhout

Selective Broadcasting for Reconfigurable Optical Interconnects in DSM systems

I ARTUNDOL DESMETWim HeirmanC DEBAESJoni DambreJan Van CampenhoutHugo Thienpont

Traffic Temporal Analysis for Reconfigurable Interconnects in Shared-Memory Systems

Wim HeirmanJoni DambreJan Van CampenhoutC DEBAESHugo Thienpont

Wavelength Tuneable Reconfigurable Optical Interconnection Network for Shared-Memory Machines

Wim HeirmanI ARTUNDOD CARVAJALL DESMETJoni DambreC DEBAESHugo ThienpontJan Van Campenhout

2004

Architectural study of the opportunities for reconfigurable optical interconnects in distributed shared memory systems

C DEBAESI ARTUNDOWim HeirmanJoni DambreK BUI VIETHugo Thienpont

Traffic Locality Analysis for Reconfigurable Interconnects in Shared-Memory Systems

Wim HeirmanJoni DambreJan Van Campenhout