Research Explorer

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Researcher

Trevor Carlson

Awards & Distinctions

21 Results

2015

Epoch profiles: microarchitecture-based application analysis and optimization

Trevor CarlsonSiddharth NilakantanMark HempsteadWim Heirman

A1 Journal Article in IEEE COMPUTER ARCHITECTURE LETTERS

2014

An evaluation of high-level mechanistic core models

Trevor CarlsonWim HeirmanStijn EyermanIbrahim HurLieven Eeckhout

A1 Journal Article in ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION

BarrierPoint: sampled simulation of multi-threaded applications

Trevor CarlsonWim HeirmanKenzo Van CraeynestLieven Eeckhout

Efficient, accurate and reproducible simulation of multi-threaded workloads

Trevor CarlsonWim HeirmanHarish PatilLieven Eeckhout

Node performance and energy analysis with the sniper multi-core simulator

Trevor CarlsonWim HeirmanKenzo Van CraeynestLieven Eeckhout

Bookchapter in Tools for high performance computing 2013

Pinballs: portable and shareable user-level checkpoints for reproducible analysis and simulation

Harish PatilTrevor Carlson

Speeding up architectural simulation through high-level core abstractions and sampling

Trevor CarlsonLieven Eeckhout

Undersubscribed threading on clustered cache architectures

Wim HeirmanTrevor CarlsonKenzo Van CraeynestIbrahim HurAamer JaleelLieven Eeckhout

2013

Node performance and energy analysis with the sniper multi-core simulator

Trevor CarlsonWim HeirmanKenzo Van CraeynestLieven Eeckhout

PCantorSim: accelerating parallel architecture simulation through fractal-based sampling

Chuntao JiangZhibin YuHai JinChengzhong XuLieven EeckhoutWim HeirmanTrevor CarlsonXiaofei Liao

A1 Journal Article in ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION

Sampled simulation of multi-threaded applications

Trevor CarlsonWim HeirmanLieven Eeckhout

2012

Power aware early design stage hardware software co-optimization

Souradip SarkarWim HeirmanTrevor CarlsonLieven Eeckhout

Power-aware multi-core simulation for early design stage hardware/software co-optimization

Wim HeirmanSouradip SarkarTrevor CarlsonIbrahim HurLieven Eeckhout

Sniper: scalable and accurate parallel multi-core simulation

Wim HeirmanTrevor CarlsonLieven Eeckhout

2011

3D stacking of DRAM on Logic

Trevor CarlsonMarco Facchini

Bookchapter in Three dimensional system integration : IC stacking process and design

Evaluating application vulnerability to soft errors in multi-level cache hierarchy

Zhe MaTrevor CarlsonWim HeirmanLieven Eeckhout

Sniper: exploring the level of abstraction for scalable and accurate parallel multi-core simulation

Trevor CarlsonWim HeirmanLieven Eeckhout

Using cycle stacks to understand scaling bottlenecks in multi-threaded workloads

Wim HeirmanTrevor CarlsonShuai CheKevin SkadronLieven Eeckhout

Using fast and accurate simulation to explore hardware/software trade-offs in the multi-core era

Wim HeirmanTrevor CarlsonSouradip SarkarPieter GhyselsWim VanrooseLieven Eeckhout

2009

Automated pathfinding tool chain for 3D-stacked integrated circuits: practical case study

Dragomir MilojevicTrevor CarlsonKris CroesRiko RadojcicDiana F RagettDirk SeynhaeveFederico AngioliniGeert Van der PlasPol Marchal

System-level power/performance evaluation of 3D stacked DRAMs for mobile applications

Marco FacchiniTrevor CarlsonAnselme VignonMartin PalkovicFrancky CatthoorWim DehaeneLuca BeniniPol Marchal