Research Explorer

Your browser does not support JavaScript or JavaScript is not enabled. Without JavaScript some functions of this webapplication may be disabled or cause error messages. To enable JavaScript, please consult the manual of your browser or contact your system administrator.

Researcher

Craig Truett Moore

Awards & Distinctions

4 Results

2010

A parallel for loop memory template for a high level synthesis compiler

Craig Truett MooreWim MeeusHarald DevosDirk Stroobandt

Developing memory templates for high level synthesis compilers

Craig Truett MooreWim MeeusHarald DevosDirk Stroobandt

2009

Optimizing the FPGA memory design for a Sobel edge detector

Craig Truett MooreHarald DevosDirk Stroobandt

Optimizing the FPGA memory design for a Sobel edge detector

Craig Truett MooreHarald DevosDirk Stroobandt