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Researcher
Amir Babaiefishani
Profile
Projects
Publications
Activities
Awards & Distinctions
9
Results
2018
Experimental results on PWM linearization of a VCO-ADC with 3rd order noise shaping
Amir Babaie Fishani
Dries Vercaemer
Johan Raman
Pieter Rombouts
P1
Conference
2018
2017
High order VCO based Delta Sigma modulator
Amir Babaie Fishani
Pieter Rombouts
Dissertation
2017
2016
Design of a low-voltage op-amp-less ASDM to linearise VCO-ADC
Amir Babaie Fishani
Pieter Rombouts
A1
Journal Article
in
ELECTRONICS LETTERS
2016
Highly linear VCO for use in VCO-ADCs
Amir Babaie Fishani
Pieter Rombouts
A1
Journal Article
in
ELECTRONICS LETTERS
2016
2015
True high-order VCO-based ADC
Amir Babaie Fishani
Pieter Rombouts
A1
Journal Article
in
ELECTRONICS LETTERS
2015
2014
Analyzing distortion in ASDMs with loop delay
Amir Babaie Fishani
Maarten De Bock
Pieter Rombouts
P1
Conference
2014
Improved offline calibration for DAC mismatch in low OSR Sigma Delta ADCs with distributed feedback
Maarten De Bock
Amir Babaie Fishani
Pieter Rombouts
P1
Conference
2014
2013
Analytical expressions for the distortion of asynchronous sigma-delta modulators
Amir Babaie Fishani
Bjorn Van Keymeulen
Pieter Rombouts
A1
Journal Article
in
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
2013
2012
Continuous time delta sigma modulation with PWM pre-coding and binary g(m) blocks
Amir Babaie Fishani
Pieter Rombouts
A1
Journal Article
in
ELECTRONICS LETTERS
2012